154 lines
5.7 KiB
C
154 lines
5.7 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2023 Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
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*/
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#if !defined(SIMDE_ARM_NEON_SHA512_H)
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#define SIMDE_ARM_NEON_SHA512_H
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#include "types.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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#define ROR64(operand, shift) (((operand) >> (shift)) | ((operand) << (64-shift)))
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#define ROL64(operand, shift) (((operand) >> (64-shift)) | ((operand) << (shift)))
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#define LSR(operand, shift) ((operand) >> (shift))
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#define LSL(operand, shift) ((operand) << (shift))
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint64x2_t
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simde_vsha512hq_u64(simde_uint64x2_t w, simde_uint64x2_t x, simde_uint64x2_t y) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA512)
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return vsha512hq_u64(w, x, y);
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#else
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simde_uint64x2_private
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r_,
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w_ = simde_uint64x2_to_private(w),
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x_ = simde_uint64x2_to_private(x),
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y_ = simde_uint64x2_to_private(y);
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uint64_t Msigma1;
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uint64_t tmp;
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Msigma1 = ROR64(y_.values[1], 14) ^ ROR64(y_.values[1], 18) ^ ROR64(y_.values[1], 41);
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r_.values[1] = (y_.values[1] & x_.values[0]) ^ (~(y_.values[1]) & x_.values[1]);
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r_.values[1] = (r_.values[1] + Msigma1 + w_.values[1]);
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tmp = r_.values[1] + y_.values[0];
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Msigma1 = ROR64(tmp, 14) ^ ROR64(tmp, 18) ^ ROR64(tmp, 41);
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r_.values[0] = (tmp & y_.values[1]) ^ (~(tmp) & x_.values[0]);
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r_.values[0] = (r_.values[0] + Msigma1 + w_.values[0]);
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return simde_uint64x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vsha512hq_u64
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#define vsha512hq_u64(w, x, y) simde_vsha512hq_u64((w), (x), (y))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint64x2_t
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simde_vsha512h2q_u64(simde_uint64x2_t w, simde_uint64x2_t x, simde_uint64x2_t y) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA512)
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return vsha512h2q_u64(w, x, y);
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#else
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simde_uint64x2_private
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r_,
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w_ = simde_uint64x2_to_private(w),
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x_ = simde_uint64x2_to_private(x),
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y_ = simde_uint64x2_to_private(y);
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uint64_t Msigma0;
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Msigma0 = ROR64(y_.values[0], 28) ^ ROR64(y_.values[0], 34) ^ ROR64(y_.values[0], 39);
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r_.values[1] = (y_.values[1] & x_.values[0]) ^ (y_.values[0] & x_.values[0]) ^ (y_.values[1] & y_.values[0]);
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r_.values[1] = (r_.values[1] + Msigma0 + w_.values[1]);
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Msigma0 = ROR64(r_.values[1], 28) ^ ROR64(r_.values[1], 34) ^ ROR64(r_.values[1], 39);
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r_.values[0] = (r_.values[1] & y_.values[0]) ^ (r_.values[1] & y_.values[1]) ^ (y_.values[1] & y_.values[0]);
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r_.values[0] = (r_.values[0] + Msigma0 + w_.values[0]);
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return simde_uint64x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vsha512h2q_u64
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#define vsha512h2q_u64(w, x, y) simde_vsha512h2q_u64((w), (x), (y))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint64x2_t
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simde_vsha512su0q_u64(simde_uint64x2_t w, simde_uint64x2_t x) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA512)
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return vsha512su0q_u64(w, x);
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#else
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simde_uint64x2_private
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r_,
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w_ = simde_uint64x2_to_private(w),
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x_ = simde_uint64x2_to_private(x);
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uint64_t sig0;
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sig0 = ROR64(w_.values[1], 1) ^ ROR64(w_.values[1], 8) ^ (w_.values[1] >> 7);
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r_.values[0] = w_.values[0] + sig0;
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sig0 = ROR64(x_.values[0], 1) ^ ROR64(x_.values[0], 8) ^ (x_.values[0] >> 7);
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r_.values[1] = w_.values[1] + sig0;
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return simde_uint64x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vsha512su0q_u64
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#define vsha512su0q_u64(w, x) simde_vsha512su0q_u64((w), (x))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint64x2_t
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simde_vsha512su1q_u64(simde_uint64x2_t w, simde_uint64x2_t x, simde_uint64x2_t y) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA512)
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return vsha512su1q_u64(w, x, y);
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#else
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simde_uint64x2_private
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r_,
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w_ = simde_uint64x2_to_private(w),
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x_ = simde_uint64x2_to_private(x),
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y_ = simde_uint64x2_to_private(y);
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uint64_t sig1;
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sig1 = ROR64(x_.values[1], 19) ^ ROR64(x_.values[1], 61) ^ (x_.values[1] >> 6);
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r_.values[1] = w_.values[1] + sig1 + y_.values[1];
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sig1 = ROR64(x_.values[0], 19) ^ ROR64(x_.values[0], 61) ^ (x_.values[0] >> 6);
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r_.values[0] = w_.values[0] + sig1 + y_.values[0];
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return simde_uint64x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vsha512su1q_u64
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#define vsha512su1q_u64(w, x, y) simde_vsha512su1q_u64((w), (x), (y))
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#endif
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#undef ROR64
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#undef ROL64
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#undef LSR
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#undef LSL
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_ARM_NEON_SHA512_H) */
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