340 lines
11 KiB
C
340 lines
11 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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* 2021 Décio Luiz Gazzoni Filho <decio@decpp.net>
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* 2023 Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
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* 2023 Chi-Wei Chu <wewe5215@gapp.nthu.edu.tw> (Copyright owned by NTHU pllab)
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*/
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#if !defined(SIMDE_ARM_NEON_ST1_X4_H)
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#define SIMDE_ARM_NEON_ST1_X4_H
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#include "types.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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#if !defined(SIMDE_BUG_INTEL_857088)
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_f16_x4(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_float16x4x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
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vst1_f16_x4(ptr, val);
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#else
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simde_float16x4_private a_[4] = { simde_float16x4_to_private(val.val[0]), simde_float16x4_to_private(val.val[1]),
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simde_float16x4_to_private(val.val[2]), simde_float16x4_to_private(val.val[3]) };
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#if defined(SIMDE_RISCV_V_NATIVE) && SIMDE_ARCH_RISCV_ZVFH
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__riscv_vse16_v_f16m1((_Float16 *)ptr , a_[0].sv64 , 4);
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__riscv_vse16_v_f16m1((_Float16 *)ptr+4 , a_[1].sv64 , 4);
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__riscv_vse16_v_f16m1((_Float16 *)ptr+8 , a_[2].sv64 , 4);
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__riscv_vse16_v_f16m1((_Float16 *)ptr+12 , a_[3].sv64 , 4);
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#else
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simde_float16_t buf[16];
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for (size_t i = 0; i < 16 ; i++) {
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buf[i] = a_[i / 4].values[i % 4];
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}
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simde_memcpy(ptr, buf, sizeof(buf));
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#endif
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vst1_f16_x4
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#define vst1_f16_x4(a, b) simde_vst1_f16_x4((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_f32_x4(simde_float32 ptr[HEDLEY_ARRAY_PARAM(8)], simde_float32x2x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
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vst1_f32_x4(ptr, val);
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#else
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simde_vst1_f32(ptr, val.val[0]);
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simde_vst1_f32(ptr+2, val.val[1]);
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simde_vst1_f32(ptr+4, val.val[2]);
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simde_vst1_f32(ptr+6, val.val[3]);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vst1_f32_x4
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#define vst1_f32_x4(ptr, val) simde_vst1_f32_x4((ptr), (val))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_f64_x4(simde_float64 ptr[HEDLEY_ARRAY_PARAM(4)], simde_float64x1x4_t val) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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vst1_f64_x4(ptr, val);
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#else
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simde_vst1_f64(ptr, val.val[0]);
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simde_vst1_f64(ptr+1, val.val[1]);
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simde_vst1_f64(ptr+2, val.val[2]);
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simde_vst1_f64(ptr+3, val.val[3]);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vst1_f64_x4
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#define vst1_f64_x4(ptr, val) simde_vst1_f64_x4((ptr), (val))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_s8_x4(int8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_int8x8x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
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vst1_s8_x4(ptr, val);
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#else
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simde_vst1_s8(ptr, val.val[0]);
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simde_vst1_s8(ptr+8, val.val[1]);
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simde_vst1_s8(ptr+16, val.val[2]);
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simde_vst1_s8(ptr+24, val.val[3]);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vst1_s8_x4
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#define vst1_s8_x4(ptr, val) simde_vst1_s8_x4((ptr), (val))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_s16_x4(int16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int16x4x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
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vst1_s16_x4(ptr, val);
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#else
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simde_vst1_s16(ptr, val.val[0]);
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simde_vst1_s16(ptr+4, val.val[1]);
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simde_vst1_s16(ptr+8, val.val[2]);
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simde_vst1_s16(ptr+12, val.val[3]);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vst1_s16_x4
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#define vst1_s16_x4(ptr, val) simde_vst1_s16_x4((ptr), (val))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_s32_x4(int32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int32x2x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
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vst1_s32_x4(ptr, val);
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#else
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simde_vst1_s32(ptr, val.val[0]);
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simde_vst1_s32(ptr+2, val.val[1]);
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simde_vst1_s32(ptr+4, val.val[2]);
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simde_vst1_s32(ptr+6, val.val[3]);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vst1_s32_x4
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#define vst1_s32_x4(ptr, val) simde_vst1_s32_x4((ptr), (val))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_s64_x4(int64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int64x1x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
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vst1_s64_x4(ptr, val);
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#else
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simde_vst1_s64(ptr, val.val[0]);
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simde_vst1_s64(ptr+1, val.val[1]);
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simde_vst1_s64(ptr+2, val.val[2]);
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simde_vst1_s64(ptr+3, val.val[3]);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vst1_s64_x4
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#define vst1_s64_x4(ptr, val) simde_vst1_s64_x4((ptr), (val))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_u8_x4(uint8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_uint8x8x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
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vst1_u8_x4(ptr, val);
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#else
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simde_vst1_u8(ptr, val.val[0]);
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simde_vst1_u8(ptr+8, val.val[1]);
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simde_vst1_u8(ptr+16, val.val[2]);
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simde_vst1_u8(ptr+24, val.val[3]);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vst1_u8_x4
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#define vst1_u8_x4(ptr, val) simde_vst1_u8_x4((ptr), (val))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_u16_x4(uint16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint16x4x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
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vst1_u16_x4(ptr, val);
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#else
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simde_vst1_u16(ptr, val.val[0]);
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simde_vst1_u16(ptr+4, val.val[1]);
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simde_vst1_u16(ptr+8, val.val[2]);
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simde_vst1_u16(ptr+12, val.val[3]);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vst1_u16_x4
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#define vst1_u16_x4(ptr, val) simde_vst1_u16_x4((ptr), (val))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_u32_x4(uint32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint32x2x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
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vst1_u32_x4(ptr, val);
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#else
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simde_vst1_u32(ptr, val.val[0]);
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simde_vst1_u32(ptr+2, val.val[1]);
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simde_vst1_u32(ptr+4, val.val[2]);
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simde_vst1_u32(ptr+6, val.val[3]);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vst1_u32_x4
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#define vst1_u32_x4(ptr, val) simde_vst1_u32_x4((ptr), (val))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_u64_x4(uint64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint64x1x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
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vst1_u64_x4(ptr, val);
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#else
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simde_vst1_u64(ptr, val.val[0]);
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simde_vst1_u64(ptr+1, val.val[1]);
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simde_vst1_u64(ptr+2, val.val[2]);
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simde_vst1_u64(ptr+3, val.val[3]);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vst1_u64_x4
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#define vst1_u64_x4(ptr, val) simde_vst1_u64_x4((ptr), (val))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_p8_x4(simde_poly8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_poly8x8x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \
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(!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
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vst1_p8_x4(ptr, val);
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#else
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simde_poly8x8_private val_[4];
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for (size_t i = 0; i < 4; i++) {
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val_[i] = simde_poly8x8_to_private(val.val[i]);
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}
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#if defined(SIMDE_RISCV_V_NATIVE)
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__riscv_vse8_v_u8m1(ptr , val_[0].sv64 , 8);
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__riscv_vse8_v_u8m1(ptr+8 , val_[1].sv64 , 8);
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__riscv_vse8_v_u8m1(ptr+16 , val_[2].sv64 , 8);
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__riscv_vse8_v_u8m1(ptr+24 , val_[3].sv64 , 8);
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#else
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simde_memcpy(ptr, &val_, sizeof(val_));
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#endif
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vst1_p8_x4
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#define vst1_p8_x4(a, b) simde_vst1_p8_x4((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_p16_x4(simde_poly16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_poly16x4x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \
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(!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
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vst1_p16_x4(ptr, val);
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#else
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simde_poly16x4_private val_[4];
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for (size_t i = 0; i < 4; i++) {
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val_[i] = simde_poly16x4_to_private(val.val[i]);
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}
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#if defined(SIMDE_RISCV_V_NATIVE)
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__riscv_vse16_v_u16m1(ptr , val_[0].sv64 , 4);
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__riscv_vse16_v_u16m1(ptr+4 , val_[1].sv64 , 4);
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__riscv_vse16_v_u16m1(ptr+8 , val_[2].sv64 , 4);
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__riscv_vse16_v_u16m1(ptr+12 , val_[3].sv64 , 4);
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#else
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simde_memcpy(ptr, &val_, sizeof(val_));
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#endif
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vst1_p16_x4
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#define vst1_p16_x4(a, b) simde_vst1_p16_x4((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_p64_x4(simde_poly64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_poly64x1x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
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(!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
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vst1_p64_x4(ptr, val);
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#else
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simde_poly64x1_private val_[4];
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for (size_t i = 0; i < 4; i++) {
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val_[i] = simde_poly64x1_to_private(val.val[i]);
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}
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#if defined(SIMDE_RISCV_V_NATIVE)
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__riscv_vse64_v_u64m1(ptr , val_[0].sv64 , 1);
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__riscv_vse64_v_u64m1(ptr+1 , val_[1].sv64 , 1);
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__riscv_vse64_v_u64m1(ptr+2 , val_[2].sv64 , 1);
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__riscv_vse64_v_u64m1(ptr+3 , val_[3].sv64 , 1);
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#else
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simde_memcpy(ptr, &val_, sizeof(val_));
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#endif
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
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#undef vst1_p64_x4
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#define vst1_p64_x4(a, b) simde_vst1_p64_x4((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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void
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simde_vst1_bf16_x4(simde_bfloat16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_bfloat16x4x4_t val) {
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#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_BF16)
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vst1_bf16_x4(ptr, val);
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#else
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simde_bfloat16x4_private val_[4];
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for (size_t i = 0; i < 4; i++) {
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val_[i] = simde_bfloat16x4_to_private(val.val[i]);
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}
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simde_memcpy(ptr, &val_, sizeof(val_));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
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#undef vst1_bf16_x4
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#define vst1_bf16_x4(a, b) simde_vst1_bf16_x4((a), (b))
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#endif
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#endif /* !defined(SIMDE_BUG_INTEL_857088) */
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_ARM_NEON_ST1_X4_H) */
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