344 lines
9.9 KiB
C
344 lines
9.9 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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* 2020 Sean Maher <seanptmaher@gmail.com> (Copyright owned by Google, LLC)
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* 2023 Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
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*/
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#if !defined(SIMDE_ARM_NEON_ZIP_H) && !defined(SIMDE_BUG_INTEL_857088)
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#define SIMDE_ARM_NEON_ZIP_H
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#include "types.h"
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#include "zip1.h"
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#include "zip2.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float16x4x2_t
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simde_vzip_f16(simde_float16x4_t a, simde_float16x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
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return vzip_f16(a, b);
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#else
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simde_float16x4x2_t r = { { simde_vzip1_f16(a, b), simde_vzip2_f16(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzip_f16
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#define vzip_f16(a, b) simde_vzip_f16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32x2x2_t
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simde_vzip_f32(simde_float32x2_t a, simde_float32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzip_f32(a, b);
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#else
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simde_float32x2x2_t r = { { simde_vzip1_f32(a, b), simde_vzip2_f32(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzip_f32
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#define vzip_f32(a, b) simde_vzip_f32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x8x2_t
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simde_vzip_s8(simde_int8x8_t a, simde_int8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzip_s8(a, b);
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#else
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simde_int8x8x2_t r = { { simde_vzip1_s8(a, b), simde_vzip2_s8(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzip_s8
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#define vzip_s8(a, b) simde_vzip_s8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x4x2_t
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simde_vzip_s16(simde_int16x4_t a, simde_int16x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzip_s16(a, b);
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#else
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simde_int16x4x2_t r = { { simde_vzip1_s16(a, b), simde_vzip2_s16(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzip_s16
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#define vzip_s16(a, b) simde_vzip_s16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x2x2_t
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simde_vzip_s32(simde_int32x2_t a, simde_int32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzip_s32(a, b);
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#else
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simde_int32x2x2_t r = { { simde_vzip1_s32(a, b), simde_vzip2_s32(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzip_s32
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#define vzip_s32(a, b) simde_vzip_s32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x8x2_t
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simde_vzip_u8(simde_uint8x8_t a, simde_uint8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzip_u8(a, b);
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#else
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simde_uint8x8x2_t r = { { simde_vzip1_u8(a, b), simde_vzip2_u8(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzip_u8
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#define vzip_u8(a, b) simde_vzip_u8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint16x4x2_t
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simde_vzip_u16(simde_uint16x4_t a, simde_uint16x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzip_u16(a, b);
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#else
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simde_uint16x4x2_t r = { { simde_vzip1_u16(a, b), simde_vzip2_u16(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzip_u16
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#define vzip_u16(a, b) simde_vzip_u16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x2x2_t
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simde_vzip_u32(simde_uint32x2_t a, simde_uint32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzip_u32(a, b);
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#else
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simde_uint32x2x2_t r = { { simde_vzip1_u32(a, b), simde_vzip2_u32(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzip_u32
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#define vzip_u32(a, b) simde_vzip_u32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float16x8x2_t
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simde_vzipq_f16(simde_float16x8_t a, simde_float16x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
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return vzipq_f16(a, b);
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#else
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simde_float16x8x2_t r = { { simde_vzip1q_f16(a, b), simde_vzip2q_f16(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzipq_f16
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#define vzipq_f16(a, b) simde_vzipq_f16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32x4x2_t
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simde_vzipq_f32(simde_float32x4_t a, simde_float32x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzipq_f32(a, b);
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#else
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simde_float32x4x2_t r = { { simde_vzip1q_f32(a, b), simde_vzip2q_f32(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzipq_f32
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#define vzipq_f32(a, b) simde_vzipq_f32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x16x2_t
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simde_vzipq_s8(simde_int8x16_t a, simde_int8x16_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzipq_s8(a, b);
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#else
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simde_int8x16x2_t r = { { simde_vzip1q_s8(a, b), simde_vzip2q_s8(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzipq_s8
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#define vzipq_s8(a, b) simde_vzipq_s8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x8x2_t
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simde_vzipq_s16(simde_int16x8_t a, simde_int16x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzipq_s16(a, b);
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#else
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simde_int16x8x2_t r = { { simde_vzip1q_s16(a, b), simde_vzip2q_s16(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzipq_s16
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#define vzipq_s16(a, b) simde_vzipq_s16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x4x2_t
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simde_vzipq_s32(simde_int32x4_t a, simde_int32x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzipq_s32(a, b);
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#else
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simde_int32x4x2_t r = { { simde_vzip1q_s32(a, b), simde_vzip2q_s32(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzipq_s32
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#define vzipq_s32(a, b) simde_vzipq_s32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x16x2_t
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simde_vzipq_u8(simde_uint8x16_t a, simde_uint8x16_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzipq_u8(a, b);
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#else
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simde_uint8x16x2_t r = { { simde_vzip1q_u8(a, b), simde_vzip2q_u8(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzipq_u8
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#define vzipq_u8(a, b) simde_vzipq_u8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint16x8x2_t
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simde_vzipq_u16(simde_uint16x8_t a, simde_uint16x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzipq_u16(a, b);
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#else
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simde_uint16x8x2_t r = { { simde_vzip1q_u16(a, b), simde_vzip2q_u16(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzipq_u16
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#define vzipq_u16(a, b) simde_vzipq_u16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x4x2_t
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simde_vzipq_u32(simde_uint32x4_t a, simde_uint32x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzipq_u32(a, b);
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#else
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simde_uint32x4x2_t r = { { simde_vzip1q_u32(a, b), simde_vzip2q_u32(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzipq_u32
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#define vzipq_u32(a, b) simde_vzipq_u32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_poly8x8x2_t
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simde_vzip_p8(simde_poly8x8_t a, simde_poly8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzip_p8(a, b);
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#else
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simde_poly8x8x2_t r = { { simde_vzip1_p8(a, b), simde_vzip2_p8(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzip_p8
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#define vzip_p8(a, b) simde_vzip_p8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_poly16x4x2_t
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simde_vzip_p16(simde_poly16x4_t a, simde_poly16x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzip_p16(a, b);
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#else
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simde_poly16x4x2_t r = { { simde_vzip1_p16(a, b), simde_vzip2_p16(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzip_p16
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#define vzip_p16(a, b) simde_vzip_p16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_poly8x16x2_t
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simde_vzipq_p8(simde_poly8x16_t a, simde_poly8x16_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzipq_p8(a, b);
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#else
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simde_poly8x16x2_t r = { { simde_vzip1q_p8(a, b), simde_vzip2q_p8(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzipq_p8
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#define vzipq_p8(a, b) simde_vzipq_p8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_poly16x8x2_t
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simde_vzipq_p16(simde_poly16x8_t a, simde_poly16x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vzipq_p16(a, b);
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#else
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simde_poly16x8x2_t r = { { simde_vzip1q_p16(a, b), simde_vzip2q_p16(a, b) } };
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vzipq_p16
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#define vzipq_p16(a, b) simde_vzipq_p16((a), (b))
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#endif
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_ARM_NEON_ZIP_H) */
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