281 lines
8.3 KiB
C
281 lines
8.3 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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*/
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#if !defined(SIMDE_ARM_NEON_MLS_H)
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#define SIMDE_ARM_NEON_MLS_H
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#include "mul.h"
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#include "sub.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32x2_t
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simde_vmls_f32(simde_float32x2_t a, simde_float32x2_t b, simde_float32x2_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmls_f32(a, b, c);
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#else
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return simde_vsub_f32(a, simde_vmul_f32(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmls_f32
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#define vmls_f32(a, b, c) simde_vmls_f32((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float64x1_t
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simde_vmls_f64(simde_float64x1_t a, simde_float64x1_t b, simde_float64x1_t c) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vmls_f64(a, b, c);
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#else
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return simde_vsub_f64(a, simde_vmul_f64(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmls_f64
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#define vmls_f64(a, b, c) simde_vmls_f64((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x8_t
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simde_vmls_s8(simde_int8x8_t a, simde_int8x8_t b, simde_int8x8_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmls_s8(a, b, c);
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#else
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return simde_vsub_s8(a, simde_vmul_s8(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmls_s8
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#define vmls_s8(a, b, c) simde_vmls_s8((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x4_t
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simde_vmls_s16(simde_int16x4_t a, simde_int16x4_t b, simde_int16x4_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmls_s16(a, b, c);
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#else
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return simde_vsub_s16(a, simde_vmul_s16(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmls_s16
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#define vmls_s16(a, b, c) simde_vmls_s16((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x2_t
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simde_vmls_s32(simde_int32x2_t a, simde_int32x2_t b, simde_int32x2_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmls_s32(a, b, c);
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#else
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return simde_vsub_s32(a, simde_vmul_s32(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmls_s32
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#define vmls_s32(a, b, c) simde_vmls_s32((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x8_t
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simde_vmls_u8(simde_uint8x8_t a, simde_uint8x8_t b, simde_uint8x8_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmls_u8(a, b, c);
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#else
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return simde_vsub_u8(a, simde_vmul_u8(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmls_u8
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#define vmls_u8(a, b, c) simde_vmls_u8((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint16x4_t
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simde_vmls_u16(simde_uint16x4_t a, simde_uint16x4_t b, simde_uint16x4_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmls_u16(a, b, c);
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#else
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return simde_vsub_u16(a, simde_vmul_u16(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmls_u16
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#define vmls_u16(a, b, c) simde_vmls_u16((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x2_t
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simde_vmls_u32(simde_uint32x2_t a, simde_uint32x2_t b, simde_uint32x2_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmls_u32(a, b, c);
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#else
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return simde_vsub_u32(a, simde_vmul_u32(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmls_u32
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#define vmls_u32(a, b, c) simde_vmls_u32((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32x4_t
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simde_vmlsq_f32(simde_float32x4_t a, simde_float32x4_t b, simde_float32x4_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmlsq_f32(a, b, c);
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#elif defined(SIMDE_X86_FMA_NATIVE)
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simde_float32x4_private
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r_,
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a_ = simde_float32x4_to_private(a),
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b_ = simde_float32x4_to_private(b),
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c_ = simde_float32x4_to_private(c);
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r_.m128 = _mm_fnmadd_ps(b_.m128, c_.m128, a_.m128);
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return simde_float32x4_from_private(r_);
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#else
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return simde_vsubq_f32(a, simde_vmulq_f32(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmlsq_f32
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#define vmlsq_f32(a, b, c) simde_vmlsq_f32((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float64x2_t
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simde_vmlsq_f64(simde_float64x2_t a, simde_float64x2_t b, simde_float64x2_t c) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vmlsq_f64(a, b, c);
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#elif defined(SIMDE_X86_FMA_NATIVE)
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simde_float64x2_private
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r_,
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a_ = simde_float64x2_to_private(a),
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b_ = simde_float64x2_to_private(b),
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c_ = simde_float64x2_to_private(c);
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r_.m128d = _mm_fnmadd_pd(b_.m128d, c_.m128d, a_.m128d);
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return simde_float64x2_from_private(r_);
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#else
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return simde_vsubq_f64(a, simde_vmulq_f64(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmlsq_f64
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#define vmlsq_f64(a, b, c) simde_vmlsq_f64((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x16_t
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simde_vmlsq_s8(simde_int8x16_t a, simde_int8x16_t b, simde_int8x16_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmlsq_s8(a, b, c);
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#else
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return simde_vsubq_s8(a, simde_vmulq_s8(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmlsq_s8
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#define vmlsq_s8(a, b, c) simde_vmlsq_s8((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x8_t
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simde_vmlsq_s16(simde_int16x8_t a, simde_int16x8_t b, simde_int16x8_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmlsq_s16(a, b, c);
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#else
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return simde_vsubq_s16(a, simde_vmulq_s16(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmlsq_s16
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#define vmlsq_s16(a, b, c) simde_vmlsq_s16((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x4_t
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simde_vmlsq_s32(simde_int32x4_t a, simde_int32x4_t b, simde_int32x4_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmlsq_s32(a, b, c);
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#else
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return simde_vsubq_s32(a, simde_vmulq_s32(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmlsq_s32
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#define vmlsq_s32(a, b, c) simde_vmlsq_s32((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x16_t
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simde_vmlsq_u8(simde_uint8x16_t a, simde_uint8x16_t b, simde_uint8x16_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmlsq_u8(a, b, c);
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#else
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return simde_vsubq_u8(a, simde_vmulq_u8(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmlsq_u8
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#define vmlsq_u8(a, b, c) simde_vmlsq_u8((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint16x8_t
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simde_vmlsq_u16(simde_uint16x8_t a, simde_uint16x8_t b, simde_uint16x8_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmlsq_u16(a, b, c);
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#else
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return simde_vsubq_u16(a, simde_vmulq_u16(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmlsq_u16
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#define vmlsq_u16(a, b, c) simde_vmlsq_u16((a), (b), (c))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x4_t
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simde_vmlsq_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmlsq_u32(a, b, c);
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#else
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return simde_vsubq_u32(a, simde_vmulq_u32(b, c));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmlsq_u32
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#define vmlsq_u32(a, b, c) simde_vmlsq_u32((a), (b), (c))
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#endif
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_ARM_NEON_MLS_H) */
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