SuperTuxKart 1.5 upstream source (from official release tarball)
This commit is contained in:
Benjamin
@@ -0,0 +1,44 @@
|
||||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*/
|
||||
|
||||
#if !defined(SIMDE_MIPS_MSA_H)
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||||
#define SIMDE_MIPS_MSA_H
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||||
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#include "msa/types.h"
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#include "msa/add_a.h"
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#include "msa/adds.h"
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#include "msa/adds_a.h"
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#include "msa/addv.h"
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#include "msa/addvi.h"
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#include "msa/and.h"
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||||
#include "msa/andi.h"
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||||
#include "msa/ld.h"
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||||
#include "msa/madd.h"
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||||
#include "msa/st.h"
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#include "msa/subv.h"
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||||
|
||||
#endif /* SIMDE_MIPS_MSA_H */
|
||||
@@ -0,0 +1,207 @@
|
||||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*/
|
||||
|
||||
#if !defined(SIMDE_MIPS_MSA_ADD_A_H)
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#define SIMDE_MIPS_MSA_ADD_A_H
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|
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#include "types.h"
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|
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HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
|
||||
SIMDE_BEGIN_DECLS_
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v16i8
|
||||
simde_msa_add_a_b(simde_v16i8 a, simde_v16i8 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_add_a_b(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vaddq_s8(vabsq_s8(a), vabsq_s8(b));
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_add(vec_abs(a), vec_abs(b));
|
||||
#else
|
||||
simde_v16i8_private
|
||||
a_ = simde_v16i8_to_private(a),
|
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b_ = simde_v16i8_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSSE3_NATIVE)
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||||
r_.m128i = _mm_add_epi8(_mm_abs_epi8(a_.m128i), _mm_abs_epi8(b_.m128i));
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
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||||
r_.v128 = wasm_i8x16_add(wasm_i8x16_abs(a_.v128), wasm_i8x16_abs(b_.v128));
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
|
||||
const __typeof__(a_.values) amask = HEDLEY_REINTERPRET_CAST(__typeof__(a_.values), a_.values < 0);
|
||||
const __typeof__(b_.values) bmask = HEDLEY_REINTERPRET_CAST(__typeof__(b_.values), b_.values < 0);
|
||||
r_.values =
|
||||
((-a_.values & amask) | (a_.values & ~amask)) +
|
||||
((-b_.values & bmask) | (b_.values & ~bmask));
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] =
|
||||
((a_.values[i] < 0) ? -a_.values[i] : a_.values[i]) +
|
||||
((b_.values[i] < 0) ? -b_.values[i] : b_.values[i]);
|
||||
}
|
||||
#endif
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||||
|
||||
return simde_v16i8_from_private(r_);
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||||
#endif
|
||||
}
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||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
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||||
#undef __msa_add_a_b
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||||
#define __msa_add_a_b(a, b) simde_msa_add_a_b((a), (b))
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||||
#endif
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||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v8i16
|
||||
simde_msa_add_a_h(simde_v8i16 a, simde_v8i16 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_add_a_h(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vaddq_s16(vabsq_s16(a), vabsq_s16(b));
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_add(vec_abs(a), vec_abs(b));
|
||||
#else
|
||||
simde_v8i16_private
|
||||
a_ = simde_v8i16_to_private(a),
|
||||
b_ = simde_v8i16_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSSE3_NATIVE)
|
||||
r_.m128i = _mm_add_epi16(_mm_abs_epi16(a_.m128i), _mm_abs_epi16(b_.m128i));
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i16x8_add(wasm_i16x8_abs(a_.v128), wasm_i16x8_abs(b_.v128));
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
|
||||
const __typeof__(a_.values) amask = HEDLEY_REINTERPRET_CAST(__typeof__(a_.values), a_.values < 0);
|
||||
const __typeof__(b_.values) bmask = HEDLEY_REINTERPRET_CAST(__typeof__(b_.values), b_.values < 0);
|
||||
r_.values =
|
||||
((-a_.values & amask) | (a_.values & ~amask)) +
|
||||
((-b_.values & bmask) | (b_.values & ~bmask));
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] =
|
||||
((a_.values[i] < 0) ? -a_.values[i] : a_.values[i]) +
|
||||
((b_.values[i] < 0) ? -b_.values[i] : b_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v8i16_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_add_a_h
|
||||
#define __msa_add_a_h(a, b) simde_msa_add_a_h((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v4i32
|
||||
simde_msa_add_a_w(simde_v4i32 a, simde_v4i32 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_add_a_w(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vaddq_s32(vabsq_s32(a), vabsq_s32(b));
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_add(vec_abs(a), vec_abs(b));
|
||||
#else
|
||||
simde_v4i32_private
|
||||
a_ = simde_v4i32_to_private(a),
|
||||
b_ = simde_v4i32_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSSE3_NATIVE)
|
||||
r_.m128i = _mm_add_epi32(_mm_abs_epi32(a_.m128i), _mm_abs_epi32(b_.m128i));
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i32x4_add(wasm_i32x4_abs(a_.v128), wasm_i32x4_abs(b_.v128));
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
|
||||
const __typeof__(a_.values) amask = HEDLEY_REINTERPRET_CAST(__typeof__(a_.values), a_.values < 0);
|
||||
const __typeof__(b_.values) bmask = HEDLEY_REINTERPRET_CAST(__typeof__(b_.values), b_.values < 0);
|
||||
r_.values =
|
||||
((-a_.values & amask) | (a_.values & ~amask)) +
|
||||
((-b_.values & bmask) | (b_.values & ~bmask));
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] =
|
||||
((a_.values[i] < 0) ? -a_.values[i] : a_.values[i]) +
|
||||
((b_.values[i] < 0) ? -b_.values[i] : b_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v4i32_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_add_a_w
|
||||
#define __msa_add_a_w(a, b) simde_msa_add_a_w((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v2i64
|
||||
simde_msa_add_a_d(simde_v2i64 a, simde_v2i64 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_add_a_d(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
return vaddq_s64(vabsq_s64(a), vabsq_s64(b));
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
|
||||
return vec_add(vec_abs(a), vec_abs(b));
|
||||
#else
|
||||
simde_v2i64_private
|
||||
a_ = simde_v2i64_to_private(a),
|
||||
b_ = simde_v2i64_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_AVX512VL_NATIVE)
|
||||
r_.m128i = _mm_add_epi64(_mm_abs_epi64(a_.m128i), _mm_abs_epi64(b_.m128i));
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i64x2_add(wasm_i64x2_abs(a_.v128), wasm_i64x2_abs(b_.v128));
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
|
||||
const __typeof__(a_.values) amask = HEDLEY_REINTERPRET_CAST(__typeof__(a_.values), a_.values < 0);
|
||||
const __typeof__(b_.values) bmask = HEDLEY_REINTERPRET_CAST(__typeof__(b_.values), b_.values < 0);
|
||||
r_.values =
|
||||
((-a_.values & amask) | (a_.values & ~amask)) +
|
||||
((-b_.values & bmask) | (b_.values & ~bmask));
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] =
|
||||
((a_.values[i] < 0) ? -a_.values[i] : a_.values[i]) +
|
||||
((b_.values[i] < 0) ? -b_.values[i] : b_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v2i64_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_add_a_d
|
||||
#define __msa_add_a_d(a, b) simde_msa_add_a_d((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* !defined(SIMDE_MIPS_MSA_ADD_A_H) */
|
||||
@@ -0,0 +1,429 @@
|
||||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*/
|
||||
|
||||
#if !defined(SIMDE_MIPS_MSA_ADDS_H)
|
||||
#define SIMDE_MIPS_MSA_ADDS_H
|
||||
|
||||
#include "types.h"
|
||||
|
||||
HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
|
||||
SIMDE_BEGIN_DECLS_
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v16i8
|
||||
simde_msa_adds_s_b(simde_v16i8 a, simde_v16i8 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_adds_s_b(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vqaddq_s8(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6)
|
||||
return vec_adds(a, b);
|
||||
#else
|
||||
simde_v16i8_private
|
||||
a_ = simde_v16i8_to_private(a),
|
||||
b_ = simde_v16i8_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i8x16_add_sat(a_.v128, b_.v128);
|
||||
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_adds_epi8(a_.m128i, b_.m128i);
|
||||
#elif defined(SIMDE_VECTOR_SCALAR)
|
||||
uint8_t au SIMDE_VECTOR(16) = HEDLEY_REINTERPRET_CAST(__typeof__(au), a_.values);
|
||||
uint8_t bu SIMDE_VECTOR(16) = HEDLEY_REINTERPRET_CAST(__typeof__(bu), b_.values);
|
||||
uint8_t ru SIMDE_VECTOR(16) = au + bu;
|
||||
|
||||
au = (au >> 7) + INT8_MAX;
|
||||
|
||||
uint8_t m SIMDE_VECTOR(16) = HEDLEY_REINTERPRET_CAST(__typeof__(m), HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (au ^ bu) | ~(bu ^ ru)) < 0);
|
||||
r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (au & ~m) | (ru & m));
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = simde_math_adds_i8(a_.values[i], b_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v16i8_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_adds_s_b
|
||||
#define __msa_adds_s_b(a, b) simde_msa_adds_s_b((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v8i16
|
||||
simde_msa_adds_s_h(simde_v8i16 a, simde_v8i16 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_adds_s_h(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vqaddq_s16(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6)
|
||||
return vec_adds(a, b);
|
||||
#else
|
||||
simde_v8i16_private
|
||||
a_ = simde_v8i16_to_private(a),
|
||||
b_ = simde_v8i16_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i16x8_add_sat(a_.v128, b_.v128);
|
||||
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_adds_epi16(a_.m128i, b_.m128i);
|
||||
#elif defined(SIMDE_VECTOR_SCALAR)
|
||||
uint16_t au SIMDE_VECTOR(16) = HEDLEY_REINTERPRET_CAST(__typeof__(au), a_.values);
|
||||
uint16_t bu SIMDE_VECTOR(16) = HEDLEY_REINTERPRET_CAST(__typeof__(bu), b_.values);
|
||||
uint16_t ru SIMDE_VECTOR(16) = au + bu;
|
||||
|
||||
au = (au >> 15) + INT16_MAX;
|
||||
|
||||
uint16_t m SIMDE_VECTOR(16) = HEDLEY_REINTERPRET_CAST(__typeof__(m), HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (au ^ bu) | ~(bu ^ ru)) < 0);
|
||||
r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (au & ~m) | (ru & m));
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = simde_math_adds_i16(a_.values[i], b_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v8i16_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_adds_s_h
|
||||
#define __msa_adds_s_h(a, b) simde_msa_adds_s_h((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v4i32
|
||||
simde_msa_adds_s_w(simde_v4i32 a, simde_v4i32 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_adds_s_w(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vqaddq_s32(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6)
|
||||
return vec_adds(a, b);
|
||||
#else
|
||||
simde_v4i32_private
|
||||
a_ = simde_v4i32_to_private(a),
|
||||
b_ = simde_v4i32_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
/* https://stackoverflow.com/a/56544654/501126 */
|
||||
const __m128i int_max = _mm_set1_epi32(INT32_MAX);
|
||||
|
||||
/* normal result (possibly wraps around) */
|
||||
const __m128i sum = _mm_add_epi32(a_.m128i, b_.m128i);
|
||||
|
||||
/* If result saturates, it has the same sign as both a and b */
|
||||
const __m128i sign_bit = _mm_srli_epi32(a_.m128i, 31); /* shift sign to lowest bit */
|
||||
|
||||
#if defined(SIMDE_X86_AVX512VL_NATIVE)
|
||||
const __m128i overflow = _mm_ternarylogic_epi32(a_.m128i, b_.m128i, sum, 0x42);
|
||||
#else
|
||||
const __m128i sign_xor = _mm_xor_si128(a_.m128i, b_.m128i);
|
||||
const __m128i overflow = _mm_andnot_si128(sign_xor, _mm_xor_si128(a_.m128i, sum));
|
||||
#endif
|
||||
|
||||
#if defined(SIMDE_X86_AVX512DQ_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
|
||||
r_.m128i = _mm_mask_add_epi32(sum, _mm_movepi32_mask(overflow), int_max, sign_bit);
|
||||
#else
|
||||
const __m128i saturated = _mm_add_epi32(int_max, sign_bit);
|
||||
|
||||
#if defined(SIMDE_X86_SSE4_1_NATIVE)
|
||||
r_.m128i =
|
||||
_mm_castps_si128(
|
||||
_mm_blendv_ps(
|
||||
_mm_castsi128_ps(sum),
|
||||
_mm_castsi128_ps(saturated),
|
||||
_mm_castsi128_ps(overflow)
|
||||
)
|
||||
);
|
||||
#else
|
||||
const __m128i overflow_mask = _mm_srai_epi32(overflow, 31);
|
||||
r_.m128i =
|
||||
_mm_or_si128(
|
||||
_mm_and_si128(overflow_mask, saturated),
|
||||
_mm_andnot_si128(overflow_mask, sum)
|
||||
);
|
||||
#endif
|
||||
#endif
|
||||
#elif defined(SIMDE_VECTOR_SCALAR)
|
||||
uint32_t au SIMDE_VECTOR(16) = HEDLEY_REINTERPRET_CAST(__typeof__(au), a_.values);
|
||||
uint32_t bu SIMDE_VECTOR(16) = HEDLEY_REINTERPRET_CAST(__typeof__(bu), b_.values);
|
||||
uint32_t ru SIMDE_VECTOR(16) = au + bu;
|
||||
|
||||
au = (au >> 31) + INT32_MAX;
|
||||
|
||||
uint32_t m SIMDE_VECTOR(16) = HEDLEY_REINTERPRET_CAST(__typeof__(m), HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (au ^ bu) | ~(bu ^ ru)) < 0);
|
||||
r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (au & ~m) | (ru & m));
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = simde_math_adds_i32(a_.values[i], b_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v4i32_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_adds_s_w
|
||||
#define __msa_adds_s_w(a, b) simde_msa_adds_s_w((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v2i64
|
||||
simde_msa_adds_s_d(simde_v2i64 a, simde_v2i64 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_adds_s_d(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vqaddq_s64(a, b);
|
||||
#else
|
||||
simde_v2i64_private
|
||||
a_ = simde_v2i64_to_private(a),
|
||||
b_ = simde_v2i64_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE4_1_NATIVE)
|
||||
/* https://stackoverflow.com/a/56544654/501126 */
|
||||
const __m128i int_max = _mm_set1_epi64x(INT64_MAX);
|
||||
|
||||
/* normal result (possibly wraps around) */
|
||||
const __m128i sum = _mm_add_epi64(a_.m128i, b_.m128i);
|
||||
|
||||
/* If result saturates, it has the same sign as both a and b */
|
||||
const __m128i sign_bit = _mm_srli_epi64(a_.m128i, 63); /* shift sign to lowest bit */
|
||||
|
||||
#if defined(SIMDE_X86_AVX512VL_NATIVE)
|
||||
const __m128i overflow = _mm_ternarylogic_epi64(a_.m128i, b_.m128i, sum, 0x42);
|
||||
#else
|
||||
const __m128i sign_xor = _mm_xor_si128(a_.m128i, b_.m128i);
|
||||
const __m128i overflow = _mm_andnot_si128(sign_xor, _mm_xor_si128(a_.m128i, sum));
|
||||
#endif
|
||||
|
||||
#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512DQ_NATIVE)
|
||||
r_.m128i = _mm_mask_add_epi64(sum, _mm_movepi64_mask(overflow), int_max, sign_bit);
|
||||
#else
|
||||
const __m128i saturated = _mm_add_epi64(int_max, sign_bit);
|
||||
|
||||
r_.m128i =
|
||||
_mm_castpd_si128(
|
||||
_mm_blendv_pd(
|
||||
_mm_castsi128_pd(sum),
|
||||
_mm_castsi128_pd(saturated),
|
||||
_mm_castsi128_pd(overflow)
|
||||
)
|
||||
);
|
||||
#endif
|
||||
#elif defined(SIMDE_VECTOR_SCALAR)
|
||||
uint64_t au SIMDE_VECTOR(16) = HEDLEY_REINTERPRET_CAST(__typeof__(au), a_.values);
|
||||
uint64_t bu SIMDE_VECTOR(16) = HEDLEY_REINTERPRET_CAST(__typeof__(bu), b_.values);
|
||||
uint64_t ru SIMDE_VECTOR(16) = au + bu;
|
||||
|
||||
au = (au >> 63) + INT64_MAX;
|
||||
|
||||
uint64_t m SIMDE_VECTOR(16) = HEDLEY_REINTERPRET_CAST(__typeof__(m), HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (au ^ bu) | ~(bu ^ ru)) < 0);
|
||||
r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), (au & ~m) | (ru & m));
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = simde_math_adds_i64(a_.values[i], b_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v2i64_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_adds_s_d
|
||||
#define __msa_adds_s_d(a, b) simde_msa_adds_s_d((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v16u8
|
||||
simde_msa_adds_u_b(simde_v16u8 a, simde_v16u8 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_adds_u_b(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vqaddq_u8(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6)
|
||||
return vec_adds(a, b);
|
||||
#else
|
||||
simde_v16u8_private
|
||||
a_ = simde_v16u8_to_private(a),
|
||||
b_ = simde_v16u8_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_u8x16_add_sat(a_.v128, b_.v128);
|
||||
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_adds_epu8(a_.m128i, b_.m128i);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT)
|
||||
r_.values = a_.values + b_.values;
|
||||
r_.values |= HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), r_.values < a_.values);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = simde_math_adds_u8(a_.values[i], b_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v16u8_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_adds_u_b
|
||||
#define __msa_adds_u_b(a, b) simde_msa_adds_u_b((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v8u16
|
||||
simde_msa_adds_u_h(simde_v8u16 a, simde_v8u16 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_adds_u_h(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vqaddq_u16(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6)
|
||||
return vec_adds(a, b);
|
||||
#else
|
||||
simde_v8u16_private
|
||||
a_ = simde_v8u16_to_private(a),
|
||||
b_ = simde_v8u16_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_u16x8_add_sat(a_.v128, b_.v128);
|
||||
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_adds_epu16(a_.m128i, b_.m128i);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT)
|
||||
r_.values = a_.values + b_.values;
|
||||
r_.values |= HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), r_.values < a_.values);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = simde_math_adds_u16(a_.values[i], b_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v8u16_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_adds_u_h
|
||||
#define __msa_adds_u_h(a, b) simde_msa_adds_u_h((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v4u32
|
||||
simde_msa_adds_u_w(simde_v4u32 a, simde_v4u32 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_adds_u_w(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vqaddq_u32(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6)
|
||||
return vec_adds(a, b);
|
||||
#else
|
||||
simde_v4u32_private
|
||||
a_ = simde_v4u32_to_private(a),
|
||||
b_ = simde_v4u32_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE4_1_NATIVE)
|
||||
#if defined(__AVX512VL__)
|
||||
__m128i notb = _mm_ternarylogic_epi32(b, b, b, 0x0f);
|
||||
#else
|
||||
__m128i notb = _mm_xor_si128(b_.m128i, _mm_set1_epi32(~INT32_C(0)));
|
||||
#endif
|
||||
r_.m128i =
|
||||
_mm_add_epi32(
|
||||
b_.m128i,
|
||||
_mm_min_epu32(
|
||||
a_.m128i,
|
||||
notb
|
||||
)
|
||||
);
|
||||
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
||||
const __m128i sum = _mm_add_epi32(a_.m128i, b_.m128i);
|
||||
const __m128i i32min = _mm_set1_epi32(INT32_MIN);
|
||||
a_.m128i = _mm_xor_si128(a_.m128i, i32min);
|
||||
r_.m128i = _mm_or_si128(_mm_cmpgt_epi32(a_.m128i, _mm_xor_si128(i32min, sum)), sum);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT)
|
||||
r_.values = a_.values + b_.values;
|
||||
r_.values |= HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), r_.values < a_.values);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = simde_math_adds_u32(a_.values[i], b_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v4u32_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_adds_u_w
|
||||
#define __msa_adds_u_w(a, b) simde_msa_adds_u_w((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v2u64
|
||||
simde_msa_adds_u_d(simde_v2u64 a, simde_v2u64 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_adds_u_d(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vqaddq_u64(a, b);
|
||||
#else
|
||||
simde_v2u64_private
|
||||
a_ = simde_v2u64_to_private(a),
|
||||
b_ = simde_v2u64_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_VECTOR_SUBSCRIPT)
|
||||
r_.values = a_.values + b_.values;
|
||||
r_.values |= HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), r_.values < a_.values);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = simde_math_adds_u64(a_.values[i], b_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v2u64_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_adds_u_d
|
||||
#define __msa_adds_u_d(a, b) simde_msa_adds_u_d((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* !defined(SIMDE_MIPS_MSA_ADDS_H) */
|
||||
@@ -0,0 +1,237 @@
|
||||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*/
|
||||
|
||||
#if !defined(SIMDE_MIPS_MSA_ADDS_A_H)
|
||||
#define SIMDE_MIPS_MSA_ADDS_A_H
|
||||
|
||||
#include "types.h"
|
||||
|
||||
HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
|
||||
SIMDE_BEGIN_DECLS_
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v16i8
|
||||
simde_msa_adds_a_b(simde_v16i8 a, simde_v16i8 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_adds_a_b(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vqaddq_s8(vabsq_s8(a), vabsq_s8(b));
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_adds(vec_abs(a), vec_abs(b));
|
||||
#else
|
||||
simde_v16i8_private
|
||||
a_ = simde_v16i8_to_private(a),
|
||||
b_ = simde_v16i8_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSSE3_NATIVE)
|
||||
r_.m128i = _mm_adds_epi8(_mm_abs_epi8(a_.m128i), _mm_abs_epi8(b_.m128i));
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i8x16_add_sat(wasm_i8x16_abs(a_.v128), wasm_i8x16_abs(b_.v128));
|
||||
#elif defined(SIMDE_VECTOR_SCALAR)
|
||||
__typeof__(a_.values) amask = HEDLEY_REINTERPRET_CAST(__typeof__(a_.values), a_.values < 0);
|
||||
__typeof__(b_.values) bmask = HEDLEY_REINTERPRET_CAST(__typeof__(b_.values), b_.values < 0);
|
||||
__typeof__(a_.values) aabs = (-a_.values & amask) | (a_.values & ~amask);
|
||||
__typeof__(b_.values) babs = (-b_.values & bmask) | (b_.values & ~bmask);
|
||||
__typeof__(r_.values) sum = aabs + babs;
|
||||
__typeof__(r_.values) max = { INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX, INT8_MAX };
|
||||
__typeof__(r_.values) smask = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), aabs > (max - babs));
|
||||
r_.values = (max & smask) | (sum & ~smask);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] =
|
||||
simde_math_adds_i8(
|
||||
((a_.values[i] < 0) ? -a_.values[i] : a_.values[i]),
|
||||
((b_.values[i] < 0) ? -b_.values[i] : b_.values[i])
|
||||
);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v16i8_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_adds_a_b
|
||||
#define __msa_adds_a_b(a, b) simde_msa_adds_a_b((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v8i16
|
||||
simde_msa_adds_a_h(simde_v8i16 a, simde_v8i16 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_adds_a_h(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vqaddq_s16(vabsq_s16(a), vabsq_s16(b));
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_adds(vec_abs(a), vec_abs(b));
|
||||
#else
|
||||
simde_v8i16_private
|
||||
a_ = simde_v8i16_to_private(a),
|
||||
b_ = simde_v8i16_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSSE3_NATIVE)
|
||||
r_.m128i = _mm_adds_epi16(_mm_abs_epi16(a_.m128i), _mm_abs_epi16(b_.m128i));
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i16x8_add_sat(wasm_i16x8_abs(a_.v128), wasm_i16x8_abs(b_.v128));
|
||||
#elif defined(SIMDE_VECTOR_SCALAR)
|
||||
__typeof__(a_.values) amask = HEDLEY_REINTERPRET_CAST(__typeof__(a_.values), a_.values < 0);
|
||||
__typeof__(b_.values) bmask = HEDLEY_REINTERPRET_CAST(__typeof__(b_.values), b_.values < 0);
|
||||
__typeof__(a_.values) aabs = (-a_.values & amask) | (a_.values & ~amask);
|
||||
__typeof__(b_.values) babs = (-b_.values & bmask) | (b_.values & ~bmask);
|
||||
__typeof__(r_.values) sum = aabs + babs;
|
||||
__typeof__(r_.values) max = { INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX, INT16_MAX };
|
||||
__typeof__(r_.values) smask = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), aabs > (max - babs));
|
||||
r_.values = (max & smask) | (sum & ~smask);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] =
|
||||
simde_math_adds_i16(
|
||||
((a_.values[i] < 0) ? -a_.values[i] : a_.values[i]),
|
||||
((b_.values[i] < 0) ? -b_.values[i] : b_.values[i])
|
||||
);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v8i16_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_adds_a_h
|
||||
#define __msa_adds_a_h(a, b) simde_msa_adds_a_h((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v4i32
|
||||
simde_msa_adds_a_w(simde_v4i32 a, simde_v4i32 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_adds_a_w(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vqaddq_s32(vabsq_s32(a), vabsq_s32(b));
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_adds(vec_abs(a), vec_abs(b));
|
||||
#else
|
||||
simde_v4i32_private
|
||||
a_ = simde_v4i32_to_private(a),
|
||||
b_ = simde_v4i32_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSSE3_NATIVE)
|
||||
__m128i aabs = _mm_abs_epi32(a_.m128i);
|
||||
__m128i babs = _mm_abs_epi32(b_.m128i);
|
||||
__m128i sum = _mm_add_epi32(aabs, babs);
|
||||
__m128i max = _mm_set1_epi32(INT32_MAX);
|
||||
__m128i smask =
|
||||
_mm_cmplt_epi32(
|
||||
_mm_sub_epi32(max, babs),
|
||||
aabs
|
||||
);
|
||||
|
||||
#if defined(SIMDE_X86_SSE4_1_NATIVE)
|
||||
r_.m128i = _mm_blendv_epi8(sum, max, smask);
|
||||
#else
|
||||
r_.m128i =
|
||||
_mm_or_si128(
|
||||
_mm_and_si128(smask, max),
|
||||
_mm_andnot_si128(smask, sum)
|
||||
);
|
||||
#endif
|
||||
#elif defined(SIMDE_VECTOR_SCALAR)
|
||||
__typeof__(a_.values) amask = HEDLEY_REINTERPRET_CAST(__typeof__(a_.values), a_.values < 0);
|
||||
__typeof__(b_.values) bmask = HEDLEY_REINTERPRET_CAST(__typeof__(b_.values), b_.values < 0);
|
||||
__typeof__(a_.values) aabs = (-a_.values & amask) | (a_.values & ~amask);
|
||||
__typeof__(b_.values) babs = (-b_.values & bmask) | (b_.values & ~bmask);
|
||||
__typeof__(r_.values) sum = aabs + babs;
|
||||
__typeof__(r_.values) max = { INT32_MAX, INT32_MAX, INT32_MAX, INT32_MAX };
|
||||
__typeof__(r_.values) smask = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), aabs > (max - babs));
|
||||
r_.values = (max & smask) | (sum & ~smask);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] =
|
||||
simde_math_adds_i32(
|
||||
((a_.values[i] < 0) ? -a_.values[i] : a_.values[i]),
|
||||
((b_.values[i] < 0) ? -b_.values[i] : b_.values[i])
|
||||
);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v4i32_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_adds_a_w
|
||||
#define __msa_adds_a_w(a, b) simde_msa_adds_a_w((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v2i64
|
||||
simde_msa_adds_a_d(simde_v2i64 a, simde_v2i64 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_adds_a_d(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
return vqaddq_s64(vabsq_s64(a), vabsq_s64(b));
|
||||
#else
|
||||
simde_v2i64_private
|
||||
a_ = simde_v2i64_to_private(a),
|
||||
b_ = simde_v2i64_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_VECTOR_SCALAR)
|
||||
__typeof__(a_.values) amask = HEDLEY_REINTERPRET_CAST(__typeof__(a_.values), a_.values < 0);
|
||||
__typeof__(b_.values) bmask = HEDLEY_REINTERPRET_CAST(__typeof__(b_.values), b_.values < 0);
|
||||
__typeof__(a_.values) aabs = (-a_.values & amask) | (a_.values & ~amask);
|
||||
__typeof__(b_.values) babs = (-b_.values & bmask) | (b_.values & ~bmask);
|
||||
__typeof__(r_.values) sum = aabs + babs;
|
||||
__typeof__(r_.values) max = { INT64_MAX, INT64_MAX };
|
||||
__typeof__(r_.values) smask = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), aabs > (max - babs));
|
||||
r_.values = (max & smask) | (sum & ~smask);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] =
|
||||
simde_math_adds_i64(
|
||||
((a_.values[i] < 0) ? -a_.values[i] : a_.values[i]),
|
||||
((b_.values[i] < 0) ? -b_.values[i] : b_.values[i])
|
||||
);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v2i64_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_adds_a_d
|
||||
#define __msa_adds_a_d(a, b) simde_msa_adds_a_d((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* !defined(SIMDE_MIPS_MSA_ADDS_A_H) */
|
||||
@@ -0,0 +1,183 @@
|
||||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*/
|
||||
|
||||
#if !defined(SIMDE_MIPS_MSA_ADDV_H)
|
||||
#define SIMDE_MIPS_MSA_ADDV_H
|
||||
|
||||
#include "types.h"
|
||||
|
||||
HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
|
||||
SIMDE_BEGIN_DECLS_
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v16i8
|
||||
simde_msa_addv_b(simde_v16i8 a, simde_v16i8 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_addv_b(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vaddq_s8(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_add(a, b);
|
||||
#else
|
||||
simde_v16i8_private
|
||||
a_ = simde_v16i8_to_private(a),
|
||||
b_ = simde_v16i8_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_add_epi8(a_.m128i, b_.m128i);
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i8x16_add(a_.v128, b_.v128);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = a_.values + b_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] + b_.values[i];
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v16i8_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_addv_b
|
||||
#define __msa_addv_b(a, b) simde_msa_addv_b((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v8i16
|
||||
simde_msa_addv_h(simde_v8i16 a, simde_v8i16 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_addv_h(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vaddq_s16(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_add(a, b);
|
||||
#else
|
||||
simde_v8i16_private
|
||||
a_ = simde_v8i16_to_private(a),
|
||||
b_ = simde_v8i16_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_add_epi16(a_.m128i, b_.m128i);
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i16x8_add(a_.v128, b_.v128);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = a_.values + b_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] + b_.values[i];
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v8i16_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_addv_h
|
||||
#define __msa_addv_h(a, b) simde_msa_addv_h((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v4i32
|
||||
simde_msa_addv_w(simde_v4i32 a, simde_v4i32 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_addv_w(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vaddq_s32(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_add(a, b);
|
||||
#else
|
||||
simde_v4i32_private
|
||||
a_ = simde_v4i32_to_private(a),
|
||||
b_ = simde_v4i32_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_add_epi32(a_.m128i, b_.m128i);
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i32x4_add(a_.v128, b_.v128);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = a_.values + b_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] + b_.values[i];
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v4i32_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_addv_w
|
||||
#define __msa_addv_w(a, b) simde_msa_addv_w((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v2i64
|
||||
simde_msa_addv_d(simde_v2i64 a, simde_v2i64 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_addv_d(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vaddq_s64(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
|
||||
return vec_add(a, b);
|
||||
#else
|
||||
simde_v2i64_private
|
||||
a_ = simde_v2i64_to_private(a),
|
||||
b_ = simde_v2i64_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_add_epi64(a_.m128i, b_.m128i);
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i64x2_add(a_.v128, b_.v128);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = a_.values + b_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] + b_.values[i];
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v2i64_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_addv_d
|
||||
#define __msa_addv_d(a, b) simde_msa_addv_d((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* !defined(SIMDE_MIPS_MSA_ADDV_H) */
|
||||
@@ -0,0 +1,187 @@
|
||||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*/
|
||||
|
||||
#if !defined(SIMDE_MIPS_MSA_ADDVI_H)
|
||||
#define SIMDE_MIPS_MSA_ADDVI_H
|
||||
|
||||
#include "types.h"
|
||||
|
||||
HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
|
||||
SIMDE_BEGIN_DECLS_
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v16i8
|
||||
simde_msa_addvi_b(simde_v16i8 a, const int imm0_31)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(imm0_31, 0, 31) {
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vaddq_s8(a, vdupq_n_s8(HEDLEY_STATIC_CAST(int8_t, imm0_31)));
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_add(a, vec_splats(HEDLEY_STATIC_CAST(signed char, imm0_31)));
|
||||
#else
|
||||
simde_v16i8_private
|
||||
a_ = simde_v16i8_to_private(a),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_add_epi8(a_.m128i, _mm_set1_epi8(HEDLEY_STATIC_CAST(int8_t, imm0_31)));
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i8x16_add(a_.v128, wasm_i8x16_splat(HEDLEY_STATIC_CAST(int8_t, imm0_31)));
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
|
||||
r_.values = a_.values + HEDLEY_STATIC_CAST(int8_t, imm0_31);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] + HEDLEY_STATIC_CAST(int8_t, imm0_31);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v16i8_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_msa_addvi_b(a, imm0_31) __msa_addvi_b((a), (imm0_31))
|
||||
#endif
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_addvi_b
|
||||
#define __msa_addvi_b(a, imm0_31) simde_msa_addvi_b((a), (imm0_31))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v8i16
|
||||
simde_msa_addvi_h(simde_v8i16 a, const int imm0_31)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(imm0_31, 0, 31) {
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vaddq_s16(a, vdupq_n_s16(HEDLEY_STATIC_CAST(int16_t, imm0_31)));
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_add(a, vec_splats(HEDLEY_STATIC_CAST(signed short, imm0_31)));
|
||||
#else
|
||||
simde_v8i16_private
|
||||
a_ = simde_v8i16_to_private(a),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_add_epi16(a_.m128i, _mm_set1_epi16(HEDLEY_STATIC_CAST(int16_t, imm0_31)));
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i16x8_add(a_.v128, wasm_i16x8_splat(HEDLEY_STATIC_CAST(int16_t, imm0_31)));
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
|
||||
r_.values = a_.values + HEDLEY_STATIC_CAST(int16_t, imm0_31);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] + HEDLEY_STATIC_CAST(int16_t, imm0_31);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v8i16_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_msa_addvi_h(a, imm0_31) __msa_addvi_h((a), (imm0_31))
|
||||
#endif
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_addvi_h
|
||||
#define __msa_addvi_h(a, imm0_31) simde_msa_addvi_h((a), (imm0_31))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v4i32
|
||||
simde_msa_addvi_w(simde_v4i32 a, const int imm0_31)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(imm0_31, 0, 31) {
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vaddq_s32(a, vdupq_n_s32(HEDLEY_STATIC_CAST(int32_t, imm0_31)));
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_add(a, vec_splats(HEDLEY_STATIC_CAST(signed int, imm0_31)));
|
||||
#else
|
||||
simde_v4i32_private
|
||||
a_ = simde_v4i32_to_private(a),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_add_epi32(a_.m128i, _mm_set1_epi32(HEDLEY_STATIC_CAST(int32_t, imm0_31)));
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i32x4_add(a_.v128, wasm_i32x4_splat(HEDLEY_STATIC_CAST(int32_t, imm0_31)));
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
|
||||
r_.values = a_.values + HEDLEY_STATIC_CAST(int32_t, imm0_31);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] + HEDLEY_STATIC_CAST(int32_t, imm0_31);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v4i32_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_msa_addvi_w(a, imm0_31) __msa_addvi_w((a), (imm0_31))
|
||||
#endif
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_addvi_w
|
||||
#define __msa_addvi_w(a, imm0_31) simde_msa_addvi_w((a), (imm0_31))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v2i64
|
||||
simde_msa_addvi_d(simde_v2i64 a, const int imm0_31)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(imm0_31, 0, 31) {
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vaddq_s64(a, vdupq_n_s64(HEDLEY_STATIC_CAST(int64_t, imm0_31)));
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
|
||||
return vec_add(a, vec_splats(HEDLEY_STATIC_CAST(signed long long, imm0_31)));
|
||||
#else
|
||||
simde_v2i64_private
|
||||
a_ = simde_v2i64_to_private(a),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_add_epi64(a_.m128i, _mm_set1_epi64x(HEDLEY_STATIC_CAST(int64_t, imm0_31)));
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i64x2_add(a_.v128, wasm_i64x2_splat(HEDLEY_STATIC_CAST(int64_t, imm0_31)));
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
|
||||
r_.values = a_.values + HEDLEY_STATIC_CAST(int64_t, HEDLEY_STATIC_CAST(int64_t, imm0_31));
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] + imm0_31;
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v2i64_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_msa_addvi_d(a, imm0_31) __msa_addvi_d((a), (imm0_31))
|
||||
#endif
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_addvi_d
|
||||
#define __msa_addvi_d(a, imm0_31) simde_msa_addvi_d((a), (imm0_31))
|
||||
#endif
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* !defined(SIMDE_MIPS_MSA_ADDVI_H) */
|
||||
@@ -0,0 +1,75 @@
|
||||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*/
|
||||
|
||||
#if !defined(SIMDE_MIPS_MSA_AND_H)
|
||||
#define SIMDE_MIPS_MSA_AND_H
|
||||
|
||||
#include "types.h"
|
||||
|
||||
HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
|
||||
SIMDE_BEGIN_DECLS_
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v16u8
|
||||
simde_msa_and_v(simde_v16u8 a, simde_v16u8 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_and_v(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vandq_u8(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_and(a, b);
|
||||
#else
|
||||
simde_v16u8_private
|
||||
a_ = simde_v16u8_to_private(a),
|
||||
b_ = simde_v16u8_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSSE3_NATIVE)
|
||||
r_.m128i = _mm_and_si128(a_.m128i, b_.m128i);
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_v128_and(a_.v128, b_.v128);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
|
||||
r_.values = a_.values & b_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] & b_.values[i];
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v16u8_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_and_v
|
||||
#define __msa_and_v(a, b) simde_msa_and_v((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* !defined(SIMDE_MIPS_MSA_AND_H) */
|
||||
@@ -0,0 +1,76 @@
|
||||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*/
|
||||
|
||||
#if !defined(SIMDE_MIPS_MSA_ANDI_H)
|
||||
#define SIMDE_MIPS_MSA_ANDI_H
|
||||
|
||||
#include "types.h"
|
||||
|
||||
HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
|
||||
SIMDE_BEGIN_DECLS_
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v16u8
|
||||
simde_msa_andi_b(simde_v16u8 a, const int imm0_255)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(imm0_255, 0, 255) {
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vandq_u8(a, vdupq_n_u8(HEDLEY_STATIC_CAST(uint8_t, imm0_255)));
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_and(a, vec_splats(HEDLEY_STATIC_CAST(unsigned char, imm0_255)));
|
||||
#else
|
||||
simde_v16u8_private
|
||||
a_ = simde_v16u8_to_private(a),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_and_si128(a_.m128i, _mm_set1_epi8(HEDLEY_STATIC_CAST(int8_t, imm0_255)));
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_v128_and(a_.v128, wasm_i8x16_splat(HEDLEY_STATIC_CAST(int8_t, imm0_255)));
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
|
||||
r_.values = a_.values & HEDLEY_STATIC_CAST(uint8_t, imm0_255);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] & HEDLEY_STATIC_CAST(int8_t, imm0_255);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v16u8_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_msa_andi_b(a, imm0_255) __msa_andi_b((a), (imm0_255))
|
||||
#endif
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_andi_b
|
||||
#define __msa_andi_b(a, imm0_255) simde_msa_andi_b((a), (imm0_255))
|
||||
#endif
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* !defined(SIMDE_MIPS_MSA_ANDI_H) */
|
||||
@@ -0,0 +1,203 @@
|
||||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*/
|
||||
|
||||
#if !defined(SIMDE_MIPS_MSA_LD_H)
|
||||
#define SIMDE_MIPS_MSA_LD_H
|
||||
|
||||
#include "types.h"
|
||||
|
||||
HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
|
||||
SIMDE_BEGIN_DECLS_
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v16i8
|
||||
simde_msa_ld_b(const void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023) {
|
||||
simde_v16i8 r;
|
||||
|
||||
simde_memcpy(&r, &(HEDLEY_REINTERPRET_CAST(const int8_t*, rs)[s10]), sizeof(r));
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_msa_ld_b(rs, s10) __msa_ld_b((rs), (s10))
|
||||
#endif
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_ld_b
|
||||
#define __msa_ld_b(rs, s10) simde_msa_ld_b((rs), (s10))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v8i16
|
||||
simde_msa_ld_h(const void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023)
|
||||
HEDLEY_REQUIRE_MSG((s10 % sizeof(int16_t)) == 0, "`s10' must be a multiple of sizeof(int16_t)") {
|
||||
simde_v8i16 r;
|
||||
|
||||
simde_memcpy(&r, &(HEDLEY_REINTERPRET_CAST(const int8_t*, rs)[s10]), sizeof(r));
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_msa_ld_h(rs, s10) __msa_ld_h((rs), (s10))
|
||||
#endif
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_ld_h
|
||||
#define __msa_ld_h(rs, s10) simde_msa_ld_h((rs), (s10))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v4i32
|
||||
simde_msa_ld_w(const void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023)
|
||||
HEDLEY_REQUIRE_MSG((s10 % sizeof(int32_t)) == 0, "`s10' must be a multiple of sizeof(int32_t)") {
|
||||
simde_v4i32 r;
|
||||
|
||||
simde_memcpy(&r, &(HEDLEY_REINTERPRET_CAST(const int8_t*, rs)[s10]), sizeof(r));
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_msa_ld_w(rs, s10) __msa_ld_w((rs), (s10))
|
||||
#endif
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_ld_w
|
||||
#define __msa_ld_w(rs, s10) simde_msa_ld_w((rs), (s10))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v2i64
|
||||
simde_msa_ld_d(const void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023)
|
||||
HEDLEY_REQUIRE_MSG((s10 % sizeof(int64_t)) == 0, "`s10' must be a multiple of sizeof(int64_t)") {
|
||||
simde_v2i64 r;
|
||||
|
||||
simde_memcpy(&r, &(HEDLEY_REINTERPRET_CAST(const int8_t*, rs)[s10]), sizeof(r));
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_msa_ld_d(rs, s10) __msa_ld_d((rs), (s10))
|
||||
#endif
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_ld_d
|
||||
#define __msa_ld_d(rs, s10) simde_msa_ld_d((rs), (s10))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v16u8
|
||||
simde_x_msa_ld_u_b(const void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023) {
|
||||
simde_v16u8 r;
|
||||
|
||||
simde_memcpy(&r, &(HEDLEY_REINTERPRET_CAST(const int8_t*, rs)[s10]), sizeof(r));
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_x_msa_ld_u_b(rs, s10) HEDLEY_REINTERPRET_CAST(simde_v16u8, __msa_ld_b((rs), (s10)))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v8u16
|
||||
simde_x_msa_ld_u_h(const void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023)
|
||||
HEDLEY_REQUIRE_MSG((s10 % sizeof(int16_t)) == 0, "`s10' must be a multiple of sizeof(int16_t)") {
|
||||
simde_v8u16 r;
|
||||
|
||||
simde_memcpy(&r, &(HEDLEY_REINTERPRET_CAST(const int8_t*, rs)[s10]), sizeof(r));
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_x_msa_ld_u_h(rs, s10) HEDLEY_REINTERPRET_CAST(simde_v8u16, __msa_ld_b((rs), (s10)))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v4u32
|
||||
simde_x_msa_ld_u_w(const void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023)
|
||||
HEDLEY_REQUIRE_MSG((s10 % sizeof(int32_t)) == 0, "`s10' must be a multiple of sizeof(int32_t)") {
|
||||
simde_v4u32 r;
|
||||
|
||||
simde_memcpy(&r, &(HEDLEY_REINTERPRET_CAST(const int8_t*, rs)[s10]), sizeof(r));
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_x_msa_ld_u_w(rs, s10) HEDLEY_REINTERPRET_CAST(simde_v4u32, __msa_ld_b((rs), (s10)))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v2u64
|
||||
simde_x_msa_ld_u_d(const void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023)
|
||||
HEDLEY_REQUIRE_MSG((s10 % sizeof(int64_t)) == 0, "`s10' must be a multiple of sizeof(int64_t)") {
|
||||
simde_v2u64 r;
|
||||
|
||||
simde_memcpy(&r, &(HEDLEY_REINTERPRET_CAST(const int8_t*, rs)[s10]), sizeof(r));
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_x_msa_ld_u_d(rs, s10) HEDLEY_REINTERPRET_CAST(simde_v2u64, __msa_ld_b((rs), (s10)))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v4f32
|
||||
simde_x_msa_fld_w(const void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023)
|
||||
HEDLEY_REQUIRE_MSG((s10 % sizeof(int32_t)) == 0, "`s10' must be a multiple of sizeof(int32_t)") {
|
||||
simde_v4f32 r;
|
||||
|
||||
simde_memcpy(&r, &(HEDLEY_REINTERPRET_CAST(const int8_t*, rs)[s10]), sizeof(r));
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_x_msa_fld_w(rs, s10) HEDLEY_REINTERPRET_CAST(simde_v4f32, __msa_ld_b((rs), (s10)))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v2f64
|
||||
simde_x_msa_fld_d(const void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023)
|
||||
HEDLEY_REQUIRE_MSG((s10 % sizeof(int64_t)) == 0, "`s10' must be a multiple of sizeof(int64_t)") {
|
||||
simde_v2f64 r;
|
||||
|
||||
simde_memcpy(&r, &(HEDLEY_REINTERPRET_CAST(const int8_t*, rs)[s10]), sizeof(r));
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_x_msa_fld_d(rs, s10) HEDLEY_REINTERPRET_CAST(simde_v2f64, __msa_ld_b((rs), (s10)))
|
||||
#endif
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* !defined(SIMDE_MIPS_MSA_LD_H) */
|
||||
@@ -0,0 +1,123 @@
|
||||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TOa THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*/
|
||||
|
||||
#if !defined(SIMDE_MIPS_MSA_MADD_H)
|
||||
#define SIMDE_MIPS_MSA_MADD_H
|
||||
|
||||
#include "types.h"
|
||||
|
||||
HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
|
||||
SIMDE_BEGIN_DECLS_
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v4f32
|
||||
simde_msa_fmadd_w(simde_v4f32 a, simde_v4f32 b, simde_v4f32 c) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_fmadd_w(a, b, c);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_FMA)
|
||||
return vfmaq_f32(a, c, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vmlaq_f32(a, b, c);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
|
||||
return vec_madd(c, b, a);
|
||||
#else
|
||||
simde_v4f32_private
|
||||
a_ = simde_v4f32_to_private(a),
|
||||
b_ = simde_v4f32_to_private(b),
|
||||
c_ = simde_v4f32_to_private(c),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_FMA_NATIVE)
|
||||
r_.m128 = _mm_fmadd_ps(c_.m128, b_.m128, a_.m128);
|
||||
#elif defined(SIMDE_X86_SSE_NATIVE)
|
||||
r_.m128 = _mm_add_ps(a_.m128, _mm_mul_ps(b_.m128, c_.m128));
|
||||
#elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
|
||||
r_.v128 = wasm_f32x4_relaxed_madd(b_.v128, c_.v128, a_.v128);
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_f32x4_add(a_.v128, wasm_f32x4_mul(b_.v128, c_.v128));
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT)
|
||||
r_.values = a_.values + (b_.values * c_.values);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = simde_math_fmaf(c_.values[i], b_.values[i], a_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v4f32_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_fmadd_w
|
||||
#define __msa_fmadd_w(a, b, c) simde_msa_fmadd_w((a), (b), (c))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v2f64
|
||||
simde_msa_fmadd_d(simde_v2f64 a, simde_v2f64 b, simde_v2f64 c) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_fmadd_d(a, b, c);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
|
||||
return vec_madd(c, b, a);
|
||||
#elif defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
return vfmaq_f64(a, c, b);
|
||||
#else
|
||||
simde_v2f64_private
|
||||
a_ = simde_v2f64_to_private(a),
|
||||
b_ = simde_v2f64_to_private(b),
|
||||
c_ = simde_v2f64_to_private(c),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_FMA_NATIVE)
|
||||
r_.m128d = _mm_fmadd_pd(c_.m128d, b_.m128d, a_.m128d);
|
||||
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128d = _mm_add_pd(a_.m128d, _mm_mul_pd(b_.m128d, c_.m128d));
|
||||
#elif defined(SIMDE_WASM_RELAXED_SIMD_NATIVE)
|
||||
r_.v128 = wasm_f64x2_relaxed_madd(b_.v128, c_.v128, a_.v128);
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_f64x2_add(a_.v128, wasm_f64x2_mul(b_.v128, c_.v128));
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = a_.values + (b_.values * c_.values);
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = simde_math_fma(c_.values[i], b_.values[i], a_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v2f64_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_fmadd_d
|
||||
#define __msa_fmadd_d(a, b, c) simde_msa_fmadd_d((a), (b), (c))
|
||||
#endif
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* !defined(SIMDE_MIPS_MSA_MADD_H) */
|
||||
@@ -0,0 +1,98 @@
|
||||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*/
|
||||
|
||||
#if !defined(SIMDE_MIPS_MSA_ST_H)
|
||||
#define SIMDE_MIPS_MSA_ST_H
|
||||
|
||||
#include "types.h"
|
||||
|
||||
HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
|
||||
SIMDE_BEGIN_DECLS_
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
void
|
||||
simde_msa_st_b(simde_v16i8 a, void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023) {
|
||||
simde_memcpy(&(HEDLEY_REINTERPRET_CAST(int8_t*, rs)[s10]), &a, sizeof(a));
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_msa_st_b(a, rs, s10) __msa_st_b((a), (rs), (s10));
|
||||
#endif
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_st_b
|
||||
#define __msa_st_b(a, rs, s10) simde_msa_st_b((a), (rs), (s10))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
void
|
||||
simde_msa_st_h(simde_v8i16 a, void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023)
|
||||
HEDLEY_REQUIRE_MSG((s10 % sizeof(int16_t)) == 0, "`s10' must be a multiple of sizeof(int16_t)") {
|
||||
simde_memcpy(&(HEDLEY_REINTERPRET_CAST(int8_t*, rs)[s10]), &a, sizeof(a));
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_msa_st_h(a, rs, s10) __msa_st_h((a), (rs), (s10));
|
||||
#endif
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_st_h
|
||||
#define __msa_st_h(a, rs, s10) simde_msa_st_h((a), (rs), (s10))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
void
|
||||
simde_msa_st_w(simde_v4i32 a, void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023)
|
||||
HEDLEY_REQUIRE_MSG((s10 % sizeof(int32_t)) == 0, "`s10' must be a multiple of sizeof(int32_t)") {
|
||||
simde_memcpy(&(HEDLEY_REINTERPRET_CAST(int8_t*, rs)[s10]), &a, sizeof(a));
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_msa_st_w(a, rs, s10) __msa_st_w((a), (rs), (s10));
|
||||
#endif
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_st_w
|
||||
#define __msa_st_w(a, rs, s10) simde_msa_st_w((a), (rs), (s10))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
void
|
||||
simde_msa_st_d(simde_v2i64 a, void * rs, const int s10)
|
||||
SIMDE_REQUIRE_CONSTANT_RANGE(s10, 0, 1023)
|
||||
HEDLEY_REQUIRE_MSG((s10 % sizeof(int64_t)) == 0, "`s10' must be a multiple of sizeof(int64_t)") {
|
||||
simde_memcpy(&(HEDLEY_REINTERPRET_CAST(int8_t*, rs)[s10]), &a, sizeof(a));
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
#define simde_msa_st_d(a, rs, s10) __msa_st_d((a), (rs), (s10));
|
||||
#endif
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_st_d
|
||||
#define __msa_st_d(a, rs, s10) simde_msa_st_d((a), (rs), (s10))
|
||||
#endif
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* !defined(SIMDE_MIPS_MSA_ST_H) */
|
||||
@@ -0,0 +1,183 @@
|
||||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*/
|
||||
|
||||
#if !defined(SIMDE_MIPS_MSA_SUBV_H)
|
||||
#define SIMDE_MIPS_MSA_SUBV_H
|
||||
|
||||
#include "types.h"
|
||||
|
||||
HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
|
||||
SIMDE_BEGIN_DECLS_
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v16i8
|
||||
simde_msa_subv_b(simde_v16i8 a, simde_v16i8 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_subv_b(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vsubq_s8(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_sub(a, b);
|
||||
#else
|
||||
simde_v16i8_private
|
||||
a_ = simde_v16i8_to_private(a),
|
||||
b_ = simde_v16i8_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_sub_epi8(a_.m128i, b_.m128i);
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i8x16_sub(a_.v128, b_.v128);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = a_.values - b_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] - b_.values[i];
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v16i8_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_subv_b
|
||||
#define __msa_subv_b(a, b) simde_msa_subv_b((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v8i16
|
||||
simde_msa_subv_h(simde_v8i16 a, simde_v8i16 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_subv_h(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vsubq_s16(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_sub(a, b);
|
||||
#else
|
||||
simde_v8i16_private
|
||||
a_ = simde_v8i16_to_private(a),
|
||||
b_ = simde_v8i16_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_sub_epi16(a_.m128i, b_.m128i);
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i16x8_sub(a_.v128, b_.v128);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = a_.values - b_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] - b_.values[i];
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v8i16_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_subv_h
|
||||
#define __msa_subv_h(a, b) simde_msa_subv_h((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v4i32
|
||||
simde_msa_subv_w(simde_v4i32 a, simde_v4i32 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_subv_w(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vsubq_s32(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
||||
return vec_sub(a, b);
|
||||
#else
|
||||
simde_v4i32_private
|
||||
a_ = simde_v4i32_to_private(a),
|
||||
b_ = simde_v4i32_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_sub_epi32(a_.m128i, b_.m128i);
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i32x4_sub(a_.v128, b_.v128);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = a_.values - b_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] - b_.values[i];
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v4i32_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_subv_w
|
||||
#define __msa_subv_w(a, b) simde_msa_subv_w((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_v2i64
|
||||
simde_msa_subv_d(simde_v2i64 a, simde_v2i64 b) {
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
return __msa_subv_d(a, b);
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vsubq_s64(a, b);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
|
||||
return vec_sub(a, b);
|
||||
#else
|
||||
simde_v2i64_private
|
||||
a_ = simde_v2i64_to_private(a),
|
||||
b_ = simde_v2i64_to_private(b),
|
||||
r_;
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_sub_epi64(a_.m128i, b_.m128i);
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i64x2_sub(a_.v128, b_.v128);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = a_.values - b_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = a_.values[i] - b_.values[i];
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_v2i64_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_MIPS_MSA_ENABLE_NATIVE_ALIASES)
|
||||
#undef __msa_subv_d
|
||||
#define __msa_subv_d(a, b) simde_msa_subv_d((a), (b))
|
||||
#endif
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* !defined(SIMDE_MIPS_MSA_SUBV_H) */
|
||||
@@ -0,0 +1,363 @@
|
||||
/* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Copyright:
|
||||
* 2021 Evan Nemerson <evan@nemerson.com>
|
||||
*/
|
||||
|
||||
#if !defined(SIMDE_MIPS_MSA_TYPES_H)
|
||||
#define SIMDE_MIPS_MSA_TYPES_H
|
||||
|
||||
#include "../../simde-common.h"
|
||||
|
||||
HEDLEY_DIAGNOSTIC_PUSH
|
||||
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
|
||||
SIMDE_BEGIN_DECLS_
|
||||
|
||||
#if defined(SIMDE_VECTOR_SUBSCRIPT)
|
||||
#define SIMDE_MIPS_MSA_DECLARE_VECTOR(Element_Type, Name, Vector_Size) Element_Type Name SIMDE_VECTOR(Vector_Size)
|
||||
#else
|
||||
#define SIMDE_MIPS_MSA_DECLARE_VECTOR(Element_Type, Name, Vector_Size) Element_Type Name[(Vector_Size) / sizeof(Element_Type)]
|
||||
#endif
|
||||
|
||||
typedef union {
|
||||
SIMDE_MIPS_MSA_DECLARE_VECTOR(int8_t, values, 16);
|
||||
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
v16i8 msa;
|
||||
#endif
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
__m128i m128i;
|
||||
#endif
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
int8x16_t neon;
|
||||
#endif
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
v128_t v128;
|
||||
#endif
|
||||
} simde_v16i8_private;
|
||||
|
||||
typedef union {
|
||||
SIMDE_MIPS_MSA_DECLARE_VECTOR(int16_t, values, 16);
|
||||
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
v8i16 msa;
|
||||
#endif
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
__m128i m128i;
|
||||
#endif
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
int16x8_t neon;
|
||||
#endif
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
v128_t v128;
|
||||
#endif
|
||||
} simde_v8i16_private;
|
||||
|
||||
typedef union {
|
||||
SIMDE_MIPS_MSA_DECLARE_VECTOR(int32_t, values, 16);
|
||||
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
v4i32 msa;
|
||||
#endif
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
__m128i m128i;
|
||||
#endif
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
int32x4_t neon;
|
||||
#endif
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
v128_t v128;
|
||||
#endif
|
||||
} simde_v4i32_private;
|
||||
|
||||
typedef union {
|
||||
SIMDE_MIPS_MSA_DECLARE_VECTOR(int64_t, values, 16);
|
||||
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
v2i64 msa;
|
||||
#endif
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
__m128i m128i;
|
||||
#endif
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
int64x2_t neon;
|
||||
#endif
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
v128_t v128;
|
||||
#endif
|
||||
} simde_v2i64_private;
|
||||
|
||||
typedef union {
|
||||
SIMDE_MIPS_MSA_DECLARE_VECTOR(uint8_t, values, 16);
|
||||
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
v16u8 msa;
|
||||
#endif
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
__m128i m128i;
|
||||
#endif
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
uint8x16_t neon;
|
||||
#endif
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
v128_t v128;
|
||||
#endif
|
||||
} simde_v16u8_private;
|
||||
|
||||
typedef union {
|
||||
SIMDE_MIPS_MSA_DECLARE_VECTOR(uint16_t, values, 16);
|
||||
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
v8u16 msa;
|
||||
#endif
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
__m128i m128i;
|
||||
#endif
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
uint16x8_t neon;
|
||||
#endif
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
v128_t v128;
|
||||
#endif
|
||||
} simde_v8u16_private;
|
||||
|
||||
typedef union {
|
||||
SIMDE_MIPS_MSA_DECLARE_VECTOR(uint32_t, values, 16);
|
||||
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
v4u32 msa;
|
||||
#endif
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
__m128i m128i;
|
||||
#endif
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
uint32x4_t neon;
|
||||
#endif
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
v128_t v128;
|
||||
#endif
|
||||
} simde_v4u32_private;
|
||||
|
||||
typedef union {
|
||||
SIMDE_MIPS_MSA_DECLARE_VECTOR(uint64_t, values, 16);
|
||||
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
v2u64 msa;
|
||||
#endif
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
__m128i m128i;
|
||||
#endif
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
uint64x2_t neon;
|
||||
#endif
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
v128_t v128;
|
||||
#endif
|
||||
} simde_v2u64_private;
|
||||
|
||||
typedef union {
|
||||
SIMDE_MIPS_MSA_DECLARE_VECTOR(simde_float32, values, 16);
|
||||
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
v4f32 msa;
|
||||
#endif
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
__m128 m128;
|
||||
#endif
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
float32x4_t neon;
|
||||
#endif
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
v128_t v128;
|
||||
#endif
|
||||
} simde_v4f32_private;
|
||||
|
||||
typedef union {
|
||||
SIMDE_MIPS_MSA_DECLARE_VECTOR(simde_float64, values, 16);
|
||||
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
v2f64 msa;
|
||||
#endif
|
||||
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
__m128d m128d;
|
||||
#endif
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
float64x2_t neon;
|
||||
#endif
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
v128_t v128;
|
||||
#endif
|
||||
} simde_v2f64_private;
|
||||
|
||||
#if defined(SIMDE_MIPS_MSA_NATIVE)
|
||||
typedef v16i8 simde_v16i8;
|
||||
typedef v8i16 simde_v8i16;
|
||||
typedef v4i32 simde_v4i32;
|
||||
typedef v2i64 simde_v2i64;
|
||||
typedef v16u8 simde_v16u8;
|
||||
typedef v8u16 simde_v8u16;
|
||||
typedef v4u32 simde_v4u32;
|
||||
typedef v2u64 simde_v2u64;
|
||||
typedef v4f32 simde_v4f32;
|
||||
typedef v2f64 simde_v2f64;
|
||||
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
typedef int8x16_t simde_v16i8;
|
||||
typedef int16x8_t simde_v8i16;
|
||||
typedef int32x4_t simde_v4i32;
|
||||
typedef int64x2_t simde_v2i64;
|
||||
typedef uint8x16_t simde_v16u8;
|
||||
typedef uint16x8_t simde_v8u16;
|
||||
typedef uint32x4_t simde_v4u32;
|
||||
typedef uint64x2_t simde_v2u64;
|
||||
typedef float32x4_t simde_v4f32;
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
typedef float64x2_t simde_v2f64;
|
||||
#elif defined(SIMDE_VECTOR)
|
||||
typedef double simde_v2f64 __attribute__((__vector_size__(16)));
|
||||
#else
|
||||
typedef simde_v2f64_private simde_v2f64;
|
||||
#endif
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
|
||||
typedef SIMDE_POWER_ALTIVEC_VECTOR(signed char) simde_v16i8;
|
||||
typedef SIMDE_POWER_ALTIVEC_VECTOR(signed short) simde_v8i16;
|
||||
typedef SIMDE_POWER_ALTIVEC_VECTOR(signed int) simde_v4i32;
|
||||
typedef SIMDE_POWER_ALTIVEC_VECTOR(unsigned char) simde_v16u8;
|
||||
typedef SIMDE_POWER_ALTIVEC_VECTOR(unsigned short) simde_v8u16;
|
||||
typedef SIMDE_POWER_ALTIVEC_VECTOR(unsigned int) simde_v4u32;
|
||||
typedef SIMDE_POWER_ALTIVEC_VECTOR(float) simde_v4f32;
|
||||
|
||||
#if defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
|
||||
typedef SIMDE_POWER_ALTIVEC_VECTOR(signed long long) simde_v2i64;
|
||||
typedef SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long) simde_v2u64;
|
||||
typedef SIMDE_POWER_ALTIVEC_VECTOR(double) simde_v2f64;
|
||||
#elif defined(SIMDE_VECTOR)
|
||||
typedef int32_t simde_v2i64 __attribute__((__vector_size__(16)));
|
||||
typedef int64_t simde_v2u64 __attribute__((__vector_size__(16)));
|
||||
typedef double simde_v2f64 __attribute__((__vector_size__(16)));
|
||||
#else
|
||||
typedef simde_v2i64_private simde_v2i64;
|
||||
typedef simde_v2u64_private simde_v2u64;
|
||||
typedef simde_v2f64_private simde_v2f64;
|
||||
#endif
|
||||
#elif defined(SIMDE_VECTOR)
|
||||
typedef int8_t simde_v16i8 __attribute__((__vector_size__(16)));
|
||||
typedef int16_t simde_v8i16 __attribute__((__vector_size__(16)));
|
||||
typedef int32_t simde_v4i32 __attribute__((__vector_size__(16)));
|
||||
typedef int64_t simde_v2i64 __attribute__((__vector_size__(16)));
|
||||
typedef uint8_t simde_v16u8 __attribute__((__vector_size__(16)));
|
||||
typedef uint16_t simde_v8u16 __attribute__((__vector_size__(16)));
|
||||
typedef uint32_t simde_v4u32 __attribute__((__vector_size__(16)));
|
||||
typedef uint64_t simde_v2u64 __attribute__((__vector_size__(16)));
|
||||
typedef simde_float32 simde_v4f32 __attribute__((__vector_size__(16)));
|
||||
typedef simde_float64 simde_v2f64 __attribute__((__vector_size__(16)));
|
||||
#else
|
||||
/* At this point, MSA support is unlikely to work well. The MSA
|
||||
* API appears to rely on the ability to cast MSA types, and there is
|
||||
* no function to cast them (like vreinterpret_* on NEON), so you are
|
||||
* supposed to use C casts. The API isn't really usable without them;
|
||||
* For example, there is no function to load floating point or
|
||||
* unsigned integer values.
|
||||
*
|
||||
* For APIs like SSE and WASM, we typedef multiple MSA types to the
|
||||
* same underlying type. This means casting will work as expected,
|
||||
* but you won't be able to overload functions based on the MSA type.
|
||||
*
|
||||
* Otherwise, all we can really do is typedef to the private types.
|
||||
* In C++ we could overload casts, but in C our options are more
|
||||
* limited and I think we would need to rely on conversion functions
|
||||
* as an extension. */
|
||||
#if defined(SIMDE_X86_SSE2_NATIVE)
|
||||
typedef __m128i simde_v16i8;
|
||||
typedef __m128i simde_v8i16;
|
||||
typedef __m128i simde_v4i32;
|
||||
typedef __m128i simde_v2i64;
|
||||
typedef __m128i simde_v16u8;
|
||||
typedef __m128i simde_v8u16;
|
||||
typedef __m128i simde_v4u32;
|
||||
typedef __m128i simde_v2u64;
|
||||
typedef __m128 simde_v4f32;
|
||||
typedef __m128d simde_v2f64;
|
||||
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
typedef v128_t simde_v16i8;
|
||||
typedef v128_t simde_v8i16;
|
||||
typedef v128_t simde_v4i32;
|
||||
typedef v128_t simde_v2i64;
|
||||
typedef v128_t simde_v16u8;
|
||||
typedef v128_t simde_v8u16;
|
||||
typedef v128_t simde_v4u32;
|
||||
typedef v128_t simde_v2u64;
|
||||
typedef v128_t simde_v4f32;
|
||||
typedef v128_t simde_v2f64;
|
||||
#else
|
||||
typedef simde_v16i8_private simde_v16i8;
|
||||
typedef simde_v8i16_private simde_v8i16;
|
||||
typedef simde_v4i32_private simde_v4i32;
|
||||
typedef simde_v2i64_private simde_v2i64;
|
||||
typedef simde_v16i8_private simde_v16u8;
|
||||
typedef simde_v8u16_private simde_v8u16;
|
||||
typedef simde_v4u32_private simde_v4u32;
|
||||
typedef simde_v2u64_private simde_v2u64;
|
||||
typedef simde_v4f32_private simde_v4f32;
|
||||
typedef simde_v2f64_private simde_v2f64;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define SIMDE_MIPS_MSA_TYPE_DEFINE_CONVERSIONS_(T) \
|
||||
SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_##T##_to_private, simde_##T##_private, simde_##T) \
|
||||
SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_##T##_from_private, simde_##T, simde_##T##_private) \
|
||||
SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_x_##T##_to_v16i8, simde_v16i8, simde_##T) \
|
||||
SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_x_##T##_to_v8i16, simde_v8i16, simde_##T) \
|
||||
SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_x_##T##_to_v4i32, simde_v4i32, simde_##T) \
|
||||
SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_x_##T##_to_v2i64, simde_v2i64, simde_##T) \
|
||||
SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_x_##T##_to_v16u8, simde_v16u8, simde_##T) \
|
||||
SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_x_##T##_to_v8u16, simde_v8u16, simde_##T) \
|
||||
SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_x_##T##_to_v4u32, simde_v4u32, simde_##T) \
|
||||
SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_x_##T##_to_v2u64, simde_v2u64, simde_##T) \
|
||||
SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_x_##T##_to_v4f32, simde_v4f32, simde_##T) \
|
||||
SIMDE_DEFINE_CONVERSION_FUNCTION_(simde_x_##T##_to_v2f64, simde_v2f64, simde_##T)
|
||||
|
||||
SIMDE_MIPS_MSA_TYPE_DEFINE_CONVERSIONS_(v16i8)
|
||||
SIMDE_MIPS_MSA_TYPE_DEFINE_CONVERSIONS_(v8i16)
|
||||
SIMDE_MIPS_MSA_TYPE_DEFINE_CONVERSIONS_(v4i32)
|
||||
SIMDE_MIPS_MSA_TYPE_DEFINE_CONVERSIONS_(v2i64)
|
||||
SIMDE_MIPS_MSA_TYPE_DEFINE_CONVERSIONS_(v16u8)
|
||||
SIMDE_MIPS_MSA_TYPE_DEFINE_CONVERSIONS_(v8u16)
|
||||
SIMDE_MIPS_MSA_TYPE_DEFINE_CONVERSIONS_(v4u32)
|
||||
SIMDE_MIPS_MSA_TYPE_DEFINE_CONVERSIONS_(v2u64)
|
||||
SIMDE_MIPS_MSA_TYPE_DEFINE_CONVERSIONS_(v4f32)
|
||||
SIMDE_MIPS_MSA_TYPE_DEFINE_CONVERSIONS_(v2f64)
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* SIMDE_MIPS_MSA_TYPES_H */
|
||||
Reference in New Issue
Block a user