SuperTuxKart 1.5 upstream source (from official release tarball)
This commit is contained in:
Benjamin
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/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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* 2020 Christopher Moore <moore@free.fr>
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* 2023 Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
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*/
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#if !defined(SIMDE_ARM_NEON_TBL_H)
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#define SIMDE_ARM_NEON_TBL_H
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#include "reinterpret.h"
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#include "combine.h"
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#include "get_low.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x8_t
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simde_vtbl1_u8(simde_uint8x8_t a, simde_uint8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vtbl1_u8(a, b);
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#elif defined(SIMDE_WASM_SIMD128_NATIVE)
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simde_uint8x16_private
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r_,
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a_ = simde_uint8x16_to_private(simde_vcombine_u8(a, a)),
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b_ = simde_uint8x16_to_private(simde_vcombine_u8(b, b));
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r_.v128 = wasm_i8x16_swizzle(a_.v128, b_.v128);
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r_.v128 = wasm_v128_and(r_.v128, wasm_u8x16_lt(b_.v128, wasm_i8x16_splat(8)));
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return simde_vget_low_u8(simde_uint8x16_from_private(r_));
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#else
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simde_uint8x8_private
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r_,
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a_ = simde_uint8x8_to_private(a),
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b_ = simde_uint8x8_to_private(b);
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#if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
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r_.m64 = _mm_shuffle_pi8(a_.m64, _mm_or_si64(b_.m64, _mm_cmpgt_pi8(b_.m64, _mm_set1_pi8(7))));
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = (b_.values[i] < 8) ? a_.values[b_.values[i]] : 0;
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}
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#endif
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return simde_uint8x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vtbl1_u8
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#define vtbl1_u8(a, b) simde_vtbl1_u8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x8_t
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simde_vtbl1_s8(simde_int8x8_t a, simde_int8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vtbl1_s8(a, b);
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#else
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return simde_vreinterpret_s8_u8(simde_vtbl1_u8(simde_vreinterpret_u8_s8(a), simde_vreinterpret_u8_s8(b)));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vtbl1_s8
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#define vtbl1_s8(a, b) simde_vtbl1_s8((a), (b))
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#endif
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#if !defined(SIMDE_BUG_INTEL_857088)
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x8_t
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simde_vtbl2_u8(simde_uint8x8x2_t a, simde_uint8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vtbl2_u8(a, b);
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#else
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simde_uint8x8_private
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r_,
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a_[2] = { simde_uint8x8_to_private(a.val[0]), simde_uint8x8_to_private(a.val[1]) },
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b_ = simde_uint8x8_to_private(b);
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#if defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
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__m128i a128 = _mm_set_epi64(a_[1].m64, a_[0].m64);
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__m128i b128 = _mm_set1_epi64(b_.m64);
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__m128i r128 = _mm_shuffle_epi8(a128, _mm_or_si128(b128, _mm_cmpgt_epi8(b128, _mm_set1_epi8(15))));
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r_.m64 = _mm_movepi64_pi64(r128);
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = (b_.values[i] < 16) ? a_[b_.values[i] / 8].values[b_.values[i] & 7] : 0;
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}
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#endif
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return simde_uint8x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vtbl2_u8
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#define vtbl2_u8(a, b) simde_vtbl2_u8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x8_t
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simde_vtbl2_s8(simde_int8x8x2_t a, simde_int8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vtbl2_s8(a, b);
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#else
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simde_uint8x8x2_t a_;
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simde_memcpy(&a_, &a, sizeof(a_));
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return simde_vreinterpret_s8_u8(simde_vtbl2_u8(a_, simde_vreinterpret_u8_s8(b)));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vtbl2_s8
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#define vtbl2_s8(a, b) simde_vtbl2_s8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x8_t
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simde_vtbl3_u8(simde_uint8x8x3_t a, simde_uint8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vtbl3_u8(a, b);
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#else
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simde_uint8x8_private
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r_,
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a_[3] = { simde_uint8x8_to_private(a.val[0]), simde_uint8x8_to_private(a.val[1]), simde_uint8x8_to_private(a.val[2]) },
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b_ = simde_uint8x8_to_private(b);
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#if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
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__m128i b128 = _mm_set1_epi64(b_.m64);
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b128 = _mm_or_si128(b128, _mm_cmpgt_epi8(b128, _mm_set1_epi8(23)));
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__m128i r128_01 = _mm_shuffle_epi8(_mm_set_epi64(a_[1].m64, a_[0].m64), b128);
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__m128i r128_2 = _mm_shuffle_epi8(_mm_set1_epi64(a_[2].m64), b128);
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__m128i r128 = _mm_blendv_epi8(r128_01, r128_2, _mm_slli_epi32(b128, 3));
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r_.m64 = _mm_movepi64_pi64(r128);
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = (b_.values[i] < 24) ? a_[b_.values[i] / 8].values[b_.values[i] & 7] : 0;
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}
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#endif
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return simde_uint8x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vtbl3_u8
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#define vtbl3_u8(a, b) simde_vtbl3_u8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x8_t
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simde_vtbl3_s8(simde_int8x8x3_t a, simde_int8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vtbl3_s8(a, b);
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#else
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simde_uint8x8x3_t a_;
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simde_memcpy(&a_, &a, sizeof(a_));
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return simde_vreinterpret_s8_u8(simde_vtbl3_u8(a_, simde_vreinterpret_u8_s8(b)));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vtbl3_s8
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#define vtbl3_s8(a, b) simde_vtbl3_s8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x8_t
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simde_vtbl4_u8(simde_uint8x8x4_t a, simde_uint8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vtbl4_u8(a, b);
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#else
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simde_uint8x8_private
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r_,
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a_[4] = { simde_uint8x8_to_private(a.val[0]), simde_uint8x8_to_private(a.val[1]), simde_uint8x8_to_private(a.val[2]), simde_uint8x8_to_private(a.val[3]) },
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b_ = simde_uint8x8_to_private(b);
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#if defined(SIMDE_X86_SSE4_1_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
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__m128i b128 = _mm_set1_epi64(b_.m64);
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b128 = _mm_or_si128(b128, _mm_cmpgt_epi8(b128, _mm_set1_epi8(31)));
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__m128i r128_01 = _mm_shuffle_epi8(_mm_set_epi64(a_[1].m64, a_[0].m64), b128);
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__m128i r128_23 = _mm_shuffle_epi8(_mm_set_epi64(a_[3].m64, a_[2].m64), b128);
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__m128i r128 = _mm_blendv_epi8(r128_01, r128_23, _mm_slli_epi32(b128, 3));
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r_.m64 = _mm_movepi64_pi64(r128);
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = (b_.values[i] < 32) ? a_[b_.values[i] / 8].values[b_.values[i] & 7] : 0;
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}
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#endif
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return simde_uint8x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vtbl4_u8
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#define vtbl4_u8(a, b) simde_vtbl4_u8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x8_t
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simde_vtbl4_s8(simde_int8x8x4_t a, simde_int8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vtbl4_s8(a, b);
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#else
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simde_uint8x8x4_t a_;
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simde_memcpy(&a_, &a, sizeof(a_));
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return simde_vreinterpret_s8_u8(simde_vtbl4_u8(a_, simde_vreinterpret_u8_s8(b)));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vtbl4_s8
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#define vtbl4_s8(a, b) simde_vtbl4_s8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_poly8x8_t
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simde_vtbl1_p8(simde_poly8x8_t a, simde_uint8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vtbl1_p8(a, b);
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#else
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return simde_vreinterpret_p8_u8(simde_vtbl1_u8(simde_vreinterpret_u8_p8(a), b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vtbl1_p8
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#define vtbl1_p8(a, b) simde_vtbl1_p8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_poly8x8_t
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simde_vtbl2_p8(simde_poly8x8x2_t a, simde_uint8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vtbl2_p8(a, b);
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#else
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simde_uint8x8x2_t a_;
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simde_memcpy(&a_, &a, sizeof(a_));
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return simde_vreinterpret_p8_u8(simde_vtbl2_u8(a_, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vtbl2_p8
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#define vtbl2_p8(a, b) simde_vtbl2_p8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_poly8x8_t
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simde_vtbl3_p8(simde_poly8x8x3_t a, simde_uint8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vtbl3_p8(a, b);
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#else
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simde_uint8x8x3_t a_;
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simde_memcpy(&a_, &a, sizeof(a_));
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return simde_vreinterpret_p8_u8(simde_vtbl3_u8(a_, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vtbl3_p8
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#define vtbl3_p8(a, b) simde_vtbl3_p8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_poly8x8_t
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simde_vtbl4_p8(simde_poly8x8x4_t a, simde_uint8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vtbl4_p8(a, b);
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#else
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simde_uint8x8x4_t a_;
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simde_memcpy(&a_, &a, sizeof(a_));
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return simde_vreinterpret_p8_u8(simde_vtbl4_u8(a_, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vtbl4_p8
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#define vtbl4_p8(a, b) simde_vtbl4_p8((a), (b))
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#endif
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#endif /* !defined(SIMDE_BUG_INTEL_857088) */
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_ARM_NEON_TBL_H) */
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