SuperTuxKart 1.5 upstream source (from official release tarball)
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Benjamin
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/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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* 2020 Christopher Moore <moore@free.fr>
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*/
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#if !defined(SIMDE_ARM_NEON_SHLL_N_H)
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#define SIMDE_ARM_NEON_SHLL_N_H
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#include "types.h"
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/*
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* The constant range requirements for the shift amount *n* looks strange.
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* The ARM Neon Intrinsics Reference states that for *_s8, 0 << n << 7. This
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* does not match the actual instruction decoding in the ARM Reference manual,
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* which states that the shift amount "must be equal to the source element width
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* in bits" (ARM DDI 0487F.b C7-1959). So for *_s8 instructions, *n* must be 8,
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* for *_s16, it must be 16, and *_s32 must be 32 (similarly for unsigned).
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*/
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x8_t
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simde_vshll_n_s8 (const simde_int8x8_t a, const int n)
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SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 8) {
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simde_int16x8_private r_;
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simde_int8x8_private a_ = simde_int8x8_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = HEDLEY_STATIC_CAST(int16_t, HEDLEY_STATIC_CAST(int16_t, a_.values[i]) << n);
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}
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return simde_int16x8_from_private(r_);
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}
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vshll_n_s8(a, n) vshll_n_s8((a), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vshll_n_s8
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#define vshll_n_s8(a, n) simde_vshll_n_s8((a), (n))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x4_t
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simde_vshll_n_s16 (const simde_int16x4_t a, const int n)
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SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 16) {
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simde_int32x4_private r_;
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simde_int16x4_private a_ = simde_int16x4_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = HEDLEY_STATIC_CAST(int32_t, a_.values[i]) << n;
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}
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return simde_int32x4_from_private(r_);
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}
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vshll_n_s16(a, n) vshll_n_s16((a), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vshll_n_s16
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#define vshll_n_s16(a, n) simde_vshll_n_s16((a), (n))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int64x2_t
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simde_vshll_n_s32 (const simde_int32x2_t a, const int n)
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SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 32) {
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simde_int64x2_private r_;
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simde_int32x2_private a_ = simde_int32x2_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = HEDLEY_STATIC_CAST(int64_t, a_.values[i]) << n;
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}
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return simde_int64x2_from_private(r_);
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}
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vshll_n_s32(a, n) vshll_n_s32((a), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vshll_n_s32
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#define vshll_n_s32(a, n) simde_vshll_n_s32((a), (n))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint16x8_t
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simde_vshll_n_u8 (const simde_uint8x8_t a, const int n)
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SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 8) {
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simde_uint16x8_private r_;
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simde_uint8x8_private a_ = simde_uint8x8_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, HEDLEY_STATIC_CAST(uint16_t, a_.values[i]) << n);
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}
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return simde_uint16x8_from_private(r_);
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}
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vshll_n_u8(a, n) vshll_n_u8((a), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vshll_n_u8
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#define vshll_n_u8(a, n) simde_vshll_n_u8((a), (n))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x4_t
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simde_vshll_n_u16 (const simde_uint16x4_t a, const int n)
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SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 16) {
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simde_uint32x4_private r_;
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simde_uint16x4_private a_ = simde_uint16x4_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = HEDLEY_STATIC_CAST(uint32_t, a_.values[i]) << n;
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}
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return simde_uint32x4_from_private(r_);
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}
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vshll_n_u16(a, n) vshll_n_u16((a), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vshll_n_u16
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#define vshll_n_u16(a, n) simde_vshll_n_u16((a), (n))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint64x2_t
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simde_vshll_n_u32 (const simde_uint32x2_t a, const int n)
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SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 32) {
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simde_uint64x2_private r_;
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simde_uint32x2_private a_ = simde_uint32x2_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = HEDLEY_STATIC_CAST(uint64_t, a_.values[i]) << n;
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}
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return simde_uint64x2_from_private(r_);
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}
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vshll_n_u32(a, n) vshll_n_u32((a), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vshll_n_u32
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#define vshll_n_u32(a, n) simde_vshll_n_u32((a), (n))
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#endif
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_ARM_NEON_SHLL_N_H) */
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