SuperTuxKart 1.5 upstream source (from official release tarball)
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Benjamin
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/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2023 Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
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*/
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#if !defined(SIMDE_ARM_NEON_SHA1_H)
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#define SIMDE_ARM_NEON_SHA1_H
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#include "types.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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#define ROL(operand, N, shift) (((operand) >> (N-shift)) | ((operand) << (shift)))
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SIMDE_FUNCTION_ATTRIBUTES
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uint32_t
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simde_vsha1h_u32(uint32_t a) {
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#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2)
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return vsha1h_u32(a);
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#else
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return ROL(a, 32, 30);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
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#undef vsha1h_u32
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#define vsha1h_u32(a) simde_vsha1h_u32((a))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x4_t
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simde_vsha1cq_u32(simde_uint32x4_t hash_abcd, uint32_t hash_e, simde_uint32x4_t wk) {
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#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2)
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return vsha1cq_u32(hash_abcd, hash_e, wk);
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#else
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simde_uint32x4_private
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x_ = simde_uint32x4_to_private(hash_abcd),
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w_ = simde_uint32x4_to_private(wk);
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uint32_t y_ = hash_e;
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(x_.values) / sizeof(x_.values[0])) ; i++) {
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uint32_t t = (((x_.values[2] ^ x_.values[3]) & x_.values[1]) ^ x_.values[3]);
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y_ = y_ + ROL(x_.values[0], 32, 5) + t + w_.values[i];
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x_.values[1] = ROL(x_.values[1], 32, 30);
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uint32_t tmp = y_;
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y_ = 0x0 | x_.values[3];
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x_.values[3] = 0x0 | x_.values[2];
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x_.values[2] = 0x0 | x_.values[1];
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x_.values[1] = 0x0 | x_.values[0];
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x_.values[0] = tmp | 0x0;
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}
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return simde_uint32x4_from_private(x_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
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#undef vsha1cq_u32
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#define vsha1cq_u32(hash_abcd, hash_e, wk) simde_vsha1cq_u32((hash_abcd), (hash_e), (wk))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x4_t
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simde_vsha1mq_u32(simde_uint32x4_t hash_abcd, uint32_t hash_e, simde_uint32x4_t wk) {
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#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2)
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return vsha1mq_u32(hash_abcd, hash_e, wk);
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#else
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simde_uint32x4_private
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x_ = simde_uint32x4_to_private(hash_abcd),
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w_ = simde_uint32x4_to_private(wk);
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uint32_t y_ = hash_e;
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(x_.values) / sizeof(x_.values[0])) ; i++) {
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uint32_t t = ((x_.values[1] & x_.values[2]) | ((x_.values[1] | x_.values[2]) & x_.values[3]));
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y_ = y_ + ROL(x_.values[0], 32, 5) + t + w_.values[i];
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x_.values[1] = ROL(x_.values[1], 32, 30);
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uint32_t tmp = y_;
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y_ = 0x0 | x_.values[3];
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x_.values[3] = 0x0 | x_.values[2];
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x_.values[2] = 0x0 | x_.values[1];
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x_.values[1] = 0x0 | x_.values[0];
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x_.values[0] = tmp | 0x0;
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}
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return simde_uint32x4_from_private(x_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
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#undef vsha1mq_u32
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#define vsha1mq_u32(hash_abcd, hash_e, wk) simde_vsha1mq_u32((hash_abcd), (hash_e), (wk))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x4_t
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simde_vsha1pq_u32(simde_uint32x4_t hash_abcd, uint32_t hash_e, simde_uint32x4_t wk) {
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#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2)
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return vsha1pq_u32(hash_abcd, hash_e, wk);
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#else
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simde_uint32x4_private
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x_ = simde_uint32x4_to_private(hash_abcd),
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w_ = simde_uint32x4_to_private(wk);
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uint32_t y_ = hash_e;
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(x_.values) / sizeof(x_.values[0])) ; i++) {
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uint32_t t = (x_.values[1] ^ x_.values[2] ^ x_.values[3]);
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y_ = y_ + ROL(x_.values[0], 32, 5) + t + w_.values[i];
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x_.values[1] = ROL(x_.values[1], 32, 30);
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uint32_t tmp = y_;
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y_ = 0x0 | x_.values[3];
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x_.values[3] = 0x0 | x_.values[2];
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x_.values[2] = 0x0 | x_.values[1];
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x_.values[1] = 0x0 | x_.values[0];
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x_.values[0] = tmp | 0x0;
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}
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return simde_uint32x4_from_private(x_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
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#undef vsha1pq_u32
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#define vsha1pq_u32(hash_abcd, hash_e, wk) simde_vsha1pq_u32((hash_abcd), (hash_e), (wk))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x4_t
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simde_vsha1su0q_u32(simde_uint32x4_t w0_3, simde_uint32x4_t w4_7, simde_uint32x4_t w8_11) {
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#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2)
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return vsha1su0q_u32(w0_3, w4_7, w8_11);
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#else
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simde_uint32x4_private
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r_,
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x_ = simde_uint32x4_to_private(w0_3),
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y_ = simde_uint32x4_to_private(w4_7),
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z_ = simde_uint32x4_to_private(w8_11);
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r_.values[3] = y_.values[1];
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r_.values[2] = y_.values[0];
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r_.values[1] = x_.values[3];
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r_.values[0] = x_.values[2];
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(x_.values) / sizeof(x_.values[0])) ; i++) {
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r_.values[i] = r_.values[i] ^ x_.values[i] ^ z_.values[i];
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}
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return simde_uint32x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
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#undef vsha1su0q_u32
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#define vsha1su0q_u32(w0_3, w4_7, w8_11) simde_vsha1su0q_u32((w0_3), (w4_7), (w8_11))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x4_t
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simde_vsha1su1q_u32(simde_uint32x4_t tw0_3, simde_uint32x4_t tw12_15) {
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#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_SHA2)
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return vsha1su1q_u32(tw0_3, tw12_15);
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#else
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simde_uint32x4_private
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r_,
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T_,
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x_ = simde_uint32x4_to_private(tw0_3),
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y_ = simde_uint32x4_to_private(tw12_15);
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T_.values[0] = x_.values[0] ^ y_.values[1];
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T_.values[1] = x_.values[1] ^ y_.values[2];
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T_.values[2] = x_.values[2] ^ y_.values[3];
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T_.values[3] = x_.values[3] ^ 0x0;
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r_.values[0] = ROL(T_.values[0], 32, 1);
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r_.values[1] = ROL(T_.values[1], 32, 1);
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r_.values[2] = ROL(T_.values[2], 32, 1);
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r_.values[3] = ROL(T_.values[3], 32, 1) ^ ROL(T_.values[0], 32, 2);
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return simde_uint32x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
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#undef vsha1su1q_u32
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#define vsha1su1q_u32(tw0_3, tw12_15) simde_vsha1su1q_u32((tw0_3), (tw12_15))
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#endif
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#undef ROL
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_ARM_NEON_SHA1_H) */
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