SuperTuxKart 1.5 upstream source (from official release tarball)
This commit is contained in:
Benjamin
@@ -0,0 +1,474 @@
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/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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||||
* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
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*
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||||
* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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||||
*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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* 2023 Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
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*/
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#if !defined(SIMDE_ARM_NEON_NEG_H)
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#define SIMDE_ARM_NEON_NEG_H
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#include "types.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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int64_t
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simde_vnegd_s64(int64_t a) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0))
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return vnegd_s64(a);
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#else
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return -a;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vnegd_s64
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#define vnegd_s64(a) simde_vnegd_s64(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float16_t
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simde_vnegh_f16(simde_float16_t a) {
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#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
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return vnegh_f16(a);
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#else
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return simde_float16_from_float32(-simde_float16_to_float32(a));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
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#undef vnegh_f16
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#define vnegh_f16(a) simde_vnegh_f16(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float16x4_t
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simde_vneg_f16(simde_float16x4_t a) {
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#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
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return vneg_f16(a);
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#else
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simde_float16x4_private
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r_,
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a_ = simde_float16x4_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = simde_vnegh_f16(a_.values[i]);
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}
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return simde_float16x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
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#undef vneg_f16
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#define vneg_f16(a) simde_vneg_f16(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32x2_t
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simde_vneg_f32(simde_float32x2_t a) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vneg_f32(a);
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#else
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simde_float32x2_private
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r_,
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a_ = simde_float32x2_to_private(a);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = -a_.values;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = -(a_.values[i]);
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}
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#endif
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return simde_float32x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vneg_f32
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#define vneg_f32(a) simde_vneg_f32(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float64x1_t
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simde_vneg_f64(simde_float64x1_t a) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vneg_f64(a);
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#else
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simde_float64x1_private
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r_,
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a_ = simde_float64x1_to_private(a);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = -a_.values;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = -(a_.values[i]);
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}
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#endif
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return simde_float64x1_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vneg_f64
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#define vneg_f64(a) simde_vneg_f64(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x8_t
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simde_vneg_s8(simde_int8x8_t a) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vneg_s8(a);
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#else
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simde_int8x8_private
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r_,
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a_ = simde_int8x8_to_private(a);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = -a_.values;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = -(a_.values[i]);
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}
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#endif
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return simde_int8x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vneg_s8
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#define vneg_s8(a) simde_vneg_s8(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x4_t
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simde_vneg_s16(simde_int16x4_t a) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vneg_s16(a);
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#else
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simde_int16x4_private
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r_,
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a_ = simde_int16x4_to_private(a);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = -a_.values;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = -(a_.values[i]);
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}
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#endif
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return simde_int16x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vneg_s16
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#define vneg_s16(a) simde_vneg_s16(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_int32x2_t
|
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simde_vneg_s32(simde_int32x2_t a) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vneg_s32(a);
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#else
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simde_int32x2_private
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r_,
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a_ = simde_int32x2_to_private(a);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS) && !defined(SIMDE_BUG_GCC_100762)
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r_.values = -a_.values;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = -(a_.values[i]);
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}
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#endif
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return simde_int32x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vneg_s32
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#define vneg_s32(a) simde_vneg_s32(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_int64x1_t
|
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simde_vneg_s64(simde_int64x1_t a) {
|
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vneg_s64(a);
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#else
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simde_int64x1_private
|
||||
r_,
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a_ = simde_int64x1_to_private(a);
|
||||
|
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = -a_.values;
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#else
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SIMDE_VECTORIZE
|
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = simde_vnegd_s64(a_.values[i]);
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}
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#endif
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return simde_int64x1_from_private(r_);
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#endif
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}
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vneg_s64
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||||
#define vneg_s64(a) simde_vneg_s64(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_float16x8_t
|
||||
simde_vnegq_f16(simde_float16x8_t a) {
|
||||
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
|
||||
return vnegq_f16(a);
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||||
#else
|
||||
simde_float16x8_private
|
||||
r_,
|
||||
a_ = simde_float16x8_to_private(a);
|
||||
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
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r_.values[i] = simde_vnegh_f16(a_.values[i]);
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}
|
||||
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return simde_float16x8_from_private(r_);
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#endif
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||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vnegq_f16
|
||||
#define vnegq_f16(a) simde_vnegq_f16(a)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_float32x4_t
|
||||
simde_vnegq_f32(simde_float32x4_t a) {
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vnegq_f32(a);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,1,0))
|
||||
return vec_neg(a);
|
||||
#else
|
||||
simde_float32x4_private
|
||||
r_,
|
||||
a_ = simde_float32x4_to_private(a);
|
||||
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_f32x4_neg(a_.v128);
|
||||
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128 = _mm_castsi128_ps(_mm_xor_si128(_mm_set1_epi32(HEDLEY_STATIC_CAST(int32_t, UINT32_C(1) << 31)), _mm_castps_si128(a_.m128)));
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = -a_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = -(a_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_float32x4_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
||||
#undef vnegq_f32
|
||||
#define vnegq_f32(a) simde_vnegq_f32(a)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_float64x2_t
|
||||
simde_vnegq_f64(simde_float64x2_t a) {
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
return vnegq_f64(a);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,1,0))
|
||||
return vec_neg(a);
|
||||
#else
|
||||
simde_float64x2_private
|
||||
r_,
|
||||
a_ = simde_float64x2_to_private(a);
|
||||
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_f64x2_neg(a_.v128);
|
||||
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128d = _mm_castsi128_pd(_mm_xor_si128(_mm_set1_epi64x(HEDLEY_STATIC_CAST(int64_t, UINT64_C(1) << 63)), _mm_castpd_si128(a_.m128d)));
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = -a_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = -(a_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_float64x2_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vnegq_f64
|
||||
#define vnegq_f64(a) simde_vnegq_f64(a)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_int8x16_t
|
||||
simde_vnegq_s8(simde_int8x16_t a) {
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vnegq_s8(a);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,1,0))
|
||||
return vec_neg(a);
|
||||
#else
|
||||
simde_int8x16_private
|
||||
r_,
|
||||
a_ = simde_int8x16_to_private(a);
|
||||
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i8x16_neg(a_.v128);
|
||||
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_sub_epi8(_mm_setzero_si128(), a_.m128i);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = -a_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = -(a_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_int8x16_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
||||
#undef vnegq_s8
|
||||
#define vnegq_s8(a) simde_vnegq_s8(a)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_int16x8_t
|
||||
simde_vnegq_s16(simde_int16x8_t a) {
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vnegq_s16(a);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,1,0))
|
||||
return vec_neg(a);
|
||||
#else
|
||||
simde_int16x8_private
|
||||
r_,
|
||||
a_ = simde_int16x8_to_private(a);
|
||||
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i16x8_neg(a_.v128);
|
||||
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_sub_epi16(_mm_setzero_si128(), a_.m128i);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = -a_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = -(a_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_int16x8_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
||||
#undef vnegq_s16
|
||||
#define vnegq_s16(a) simde_vnegq_s16(a)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_int32x4_t
|
||||
simde_vnegq_s32(simde_int32x4_t a) {
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
||||
return vnegq_s32(a);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,1,0))
|
||||
return vec_neg(a);
|
||||
#else
|
||||
simde_int32x4_private
|
||||
r_,
|
||||
a_ = simde_int32x4_to_private(a);
|
||||
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i32x4_neg(a_.v128);
|
||||
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_sub_epi32(_mm_setzero_si128(), a_.m128i);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = -a_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = -(a_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_int32x4_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
||||
#undef vnegq_s32
|
||||
#define vnegq_s32(a) simde_vnegq_s32(a)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_int64x2_t
|
||||
simde_vnegq_s64(simde_int64x2_t a) {
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
return vnegq_s64(a);
|
||||
#elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,1,0))
|
||||
return vec_neg(a);
|
||||
#else
|
||||
simde_int64x2_private
|
||||
r_,
|
||||
a_ = simde_int64x2_to_private(a);
|
||||
|
||||
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
||||
r_.v128 = wasm_i64x2_neg(a_.v128);
|
||||
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
||||
r_.m128i = _mm_sub_epi64(_mm_setzero_si128(), a_.m128i);
|
||||
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
||||
r_.values = -a_.values;
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
||||
r_.values[i] = simde_vnegd_s64(a_.values[i]);
|
||||
}
|
||||
#endif
|
||||
|
||||
return simde_int64x2_from_private(r_);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
||||
#undef vnegq_s64
|
||||
#define vnegq_s64(a) simde_vnegq_s64(a)
|
||||
#endif
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* !defined(SIMDE_ARM_NEON_NEG_H) */
|
||||
Reference in New Issue
Block a user