SuperTuxKart 1.5 upstream source (from official release tarball)
This commit is contained in:
Benjamin
@@ -0,0 +1,465 @@
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/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
|
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* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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* 2023 Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
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*/
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#if !defined(SIMDE_ARM_NEON_MAXV_H)
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#define SIMDE_ARM_NEON_MAXV_H
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#include "types.h"
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#include <float.h>
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
|
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|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_float16_t
|
||||
simde_vmaxv_f16(simde_float16x4_t a) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
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return vmaxv_f16(a);
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#else
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simde_float32_t r;
|
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simde_float16x4_private a_ = simde_float16x4_to_private(a);
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|
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r = simde_float16_to_float32(SIMDE_NINFINITYHF);
|
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#if defined(SIMDE_FAST_NANS)
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SIMDE_VECTORIZE_REDUCTION(max:r)
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#else
|
||||
SIMDE_VECTORIZE
|
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#endif
|
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for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
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simde_float32_t a32 = simde_float16_to_float32(a_.values[i]);
|
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#if defined(SIMDE_FAST_NANS)
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r = a32 > r ? a32 : r;
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#else
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r = a32 > r ? a32 : (a32 <= r ? r : ((a32 == a32) ? r : a32));
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#endif
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}
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return simde_float16_from_float32(r);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vmaxv_f16
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#define vmaxv_f16(v) simde_vmaxv_f16(v)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
|
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simde_float32_t
|
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simde_vmaxv_f32(simde_float32x2_t a) {
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simde_float32_t r;
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|
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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r = vmaxv_f32(a);
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#else
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simde_float32x2_private a_ = simde_float32x2_to_private(a);
|
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|
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r = -SIMDE_MATH_INFINITYF;
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SIMDE_VECTORIZE_REDUCTION(max:r)
|
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for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
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r = a_.values[i] > r ? a_.values[i] : r;
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}
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#endif
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return r;
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
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#undef vmaxv_f32
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#define vmaxv_f32(v) simde_vmaxv_f32(v)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
|
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int8_t
|
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simde_vmaxv_s8(simde_int8x8_t a) {
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int8_t r;
|
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|
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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r = vmaxv_s8(a);
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#else
|
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simde_int8x8_private a_ = simde_int8x8_to_private(a);
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|
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r = INT8_MIN;
|
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SIMDE_VECTORIZE_REDUCTION(max:r)
|
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for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
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r = a_.values[i] > r ? a_.values[i] : r;
|
||||
}
|
||||
#endif
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||||
|
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return r;
|
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}
|
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
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#undef vmaxv_s8
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#define vmaxv_s8(v) simde_vmaxv_s8(v)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
|
||||
int16_t
|
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simde_vmaxv_s16(simde_int16x4_t a) {
|
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int16_t r;
|
||||
|
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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r = vmaxv_s16(a);
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#else
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simde_int16x4_private a_ = simde_int16x4_to_private(a);
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|
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r = INT16_MIN;
|
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SIMDE_VECTORIZE_REDUCTION(max:r)
|
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for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
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r = a_.values[i] > r ? a_.values[i] : r;
|
||||
}
|
||||
#endif
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||||
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return r;
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||||
}
|
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
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#undef vmaxv_s16
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#define vmaxv_s16(v) simde_vmaxv_s16(v)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
|
||||
int32_t
|
||||
simde_vmaxv_s32(simde_int32x2_t a) {
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int32_t r;
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||||
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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r = vmaxv_s32(a);
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||||
#else
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||||
simde_int32x2_private a_ = simde_int32x2_to_private(a);
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|
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r = INT32_MIN;
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||||
SIMDE_VECTORIZE_REDUCTION(max:r)
|
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for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
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r = a_.values[i] > r ? a_.values[i] : r;
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||||
}
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||||
#endif
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||||
|
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return r;
|
||||
}
|
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vmaxv_s32
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#define vmaxv_s32(v) simde_vmaxv_s32(v)
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#endif
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|
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SIMDE_FUNCTION_ATTRIBUTES
|
||||
uint8_t
|
||||
simde_vmaxv_u8(simde_uint8x8_t a) {
|
||||
uint8_t r;
|
||||
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
r = vmaxv_u8(a);
|
||||
#else
|
||||
simde_uint8x8_private a_ = simde_uint8x8_to_private(a);
|
||||
|
||||
r = 0;
|
||||
SIMDE_VECTORIZE_REDUCTION(max:r)
|
||||
for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
||||
r = a_.values[i] > r ? a_.values[i] : r;
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||||
}
|
||||
#endif
|
||||
|
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return r;
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||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vmaxv_u8
|
||||
#define vmaxv_u8(v) simde_vmaxv_u8(v)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
uint16_t
|
||||
simde_vmaxv_u16(simde_uint16x4_t a) {
|
||||
uint16_t r;
|
||||
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
r = vmaxv_u16(a);
|
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#else
|
||||
simde_uint16x4_private a_ = simde_uint16x4_to_private(a);
|
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|
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r = 0;
|
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SIMDE_VECTORIZE_REDUCTION(max:r)
|
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for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
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r = a_.values[i] > r ? a_.values[i] : r;
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||||
}
|
||||
#endif
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||||
|
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return r;
|
||||
}
|
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
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#undef vmaxv_u16
|
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#define vmaxv_u16(v) simde_vmaxv_u16(v)
|
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#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
uint32_t
|
||||
simde_vmaxv_u32(simde_uint32x2_t a) {
|
||||
uint32_t r;
|
||||
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
r = vmaxv_u32(a);
|
||||
#else
|
||||
simde_uint32x2_private a_ = simde_uint32x2_to_private(a);
|
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|
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r = 0;
|
||||
SIMDE_VECTORIZE_REDUCTION(max:r)
|
||||
for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
||||
r = a_.values[i] > r ? a_.values[i] : r;
|
||||
}
|
||||
#endif
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vmaxv_u32
|
||||
#define vmaxv_u32(v) simde_vmaxv_u32(v)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_float16_t
|
||||
simde_vmaxvq_f16(simde_float16x8_t a) {
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
|
||||
return vmaxvq_f16(a);
|
||||
#else
|
||||
simde_float32_t r;
|
||||
simde_float16x8_private a_ = simde_float16x8_to_private(a);
|
||||
|
||||
r = simde_float16_to_float32(SIMDE_NINFINITYHF);
|
||||
#if defined(SIMDE_FAST_NANS)
|
||||
SIMDE_VECTORIZE_REDUCTION(max:r)
|
||||
#else
|
||||
SIMDE_VECTORIZE
|
||||
#endif
|
||||
for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
||||
simde_float32_t a32 = simde_float16_to_float32(a_.values[i]);
|
||||
#if defined(SIMDE_FAST_NANS)
|
||||
r = a32 > r ? a32 : r;
|
||||
#else
|
||||
r = a32 > r ? a32 : (a32 <= r ? r : ((a32 == a32) ? r : a32));
|
||||
#endif
|
||||
}
|
||||
|
||||
return simde_float16_from_float32(r);
|
||||
#endif
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vmaxvq_f16
|
||||
#define vmaxvq_f16(v) simde_vmaxvq_f16(v)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_float32_t
|
||||
simde_vmaxvq_f32(simde_float32x4_t a) {
|
||||
simde_float32_t r;
|
||||
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
r = vmaxvq_f32(a);
|
||||
#else
|
||||
simde_float32x4_private a_ = simde_float32x4_to_private(a);
|
||||
|
||||
r = -SIMDE_MATH_INFINITYF;
|
||||
SIMDE_VECTORIZE_REDUCTION(max:r)
|
||||
for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
||||
r = a_.values[i] > r ? a_.values[i] : r;
|
||||
}
|
||||
#endif
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vmaxvq_f32
|
||||
#define vmaxvq_f32(v) simde_vmaxvq_f32(v)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
simde_float64_t
|
||||
simde_vmaxvq_f64(simde_float64x2_t a) {
|
||||
simde_float64_t r;
|
||||
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
r = vmaxvq_f64(a);
|
||||
#else
|
||||
simde_float64x2_private a_ = simde_float64x2_to_private(a);
|
||||
|
||||
r = -SIMDE_MATH_INFINITY;
|
||||
SIMDE_VECTORIZE_REDUCTION(max:r)
|
||||
for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
||||
r = a_.values[i] > r ? a_.values[i] : r;
|
||||
}
|
||||
#endif
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vmaxvq_f64
|
||||
#define vmaxvq_f64(v) simde_vmaxvq_f64(v)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
int8_t
|
||||
simde_vmaxvq_s8(simde_int8x16_t a) {
|
||||
int8_t r;
|
||||
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
r = vmaxvq_s8(a);
|
||||
#else
|
||||
simde_int8x16_private a_ = simde_int8x16_to_private(a);
|
||||
|
||||
r = INT8_MIN;
|
||||
SIMDE_VECTORIZE_REDUCTION(max:r)
|
||||
for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
||||
r = a_.values[i] > r ? a_.values[i] : r;
|
||||
}
|
||||
#endif
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vmaxvq_s8
|
||||
#define vmaxvq_s8(v) simde_vmaxvq_s8(v)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
int16_t
|
||||
simde_vmaxvq_s16(simde_int16x8_t a) {
|
||||
int16_t r;
|
||||
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
r = vmaxvq_s16(a);
|
||||
#else
|
||||
simde_int16x8_private a_ = simde_int16x8_to_private(a);
|
||||
|
||||
r = INT16_MIN;
|
||||
SIMDE_VECTORIZE_REDUCTION(max:r)
|
||||
for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
||||
r = a_.values[i] > r ? a_.values[i] : r;
|
||||
}
|
||||
#endif
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vmaxvq_s16
|
||||
#define vmaxvq_s16(v) simde_vmaxvq_s16(v)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
int32_t
|
||||
simde_vmaxvq_s32(simde_int32x4_t a) {
|
||||
int32_t r;
|
||||
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
r = vmaxvq_s32(a);
|
||||
#else
|
||||
simde_int32x4_private a_ = simde_int32x4_to_private(a);
|
||||
|
||||
r = INT32_MIN;
|
||||
SIMDE_VECTORIZE_REDUCTION(max:r)
|
||||
for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
||||
r = a_.values[i] > r ? a_.values[i] : r;
|
||||
}
|
||||
#endif
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vmaxvq_s32
|
||||
#define vmaxvq_s32(v) simde_vmaxvq_s32(v)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
uint8_t
|
||||
simde_vmaxvq_u8(simde_uint8x16_t a) {
|
||||
uint8_t r;
|
||||
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
r = vmaxvq_u8(a);
|
||||
#else
|
||||
simde_uint8x16_private a_ = simde_uint8x16_to_private(a);
|
||||
|
||||
r = 0;
|
||||
SIMDE_VECTORIZE_REDUCTION(max:r)
|
||||
for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
||||
r = a_.values[i] > r ? a_.values[i] : r;
|
||||
}
|
||||
#endif
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vmaxvq_u8
|
||||
#define vmaxvq_u8(v) simde_vmaxvq_u8(v)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
uint16_t
|
||||
simde_vmaxvq_u16(simde_uint16x8_t a) {
|
||||
uint16_t r;
|
||||
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
r = vmaxvq_u16(a);
|
||||
#else
|
||||
simde_uint16x8_private a_ = simde_uint16x8_to_private(a);
|
||||
|
||||
r = 0;
|
||||
SIMDE_VECTORIZE_REDUCTION(max:r)
|
||||
for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
||||
r = a_.values[i] > r ? a_.values[i] : r;
|
||||
}
|
||||
#endif
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vmaxvq_u16
|
||||
#define vmaxvq_u16(v) simde_vmaxvq_u16(v)
|
||||
#endif
|
||||
|
||||
SIMDE_FUNCTION_ATTRIBUTES
|
||||
uint32_t
|
||||
simde_vmaxvq_u32(simde_uint32x4_t a) {
|
||||
uint32_t r;
|
||||
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
||||
r = vmaxvq_u32(a);
|
||||
#else
|
||||
simde_uint32x4_private a_ = simde_uint32x4_to_private(a);
|
||||
|
||||
r = 0;
|
||||
SIMDE_VECTORIZE_REDUCTION(max:r)
|
||||
for (size_t i = 0 ; i < (sizeof(a_.values) / sizeof(a_.values[0])) ; i++) {
|
||||
r = a_.values[i] > r ? a_.values[i] : r;
|
||||
}
|
||||
#endif
|
||||
|
||||
return r;
|
||||
}
|
||||
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
||||
#undef vmaxvq_u32
|
||||
#define vmaxvq_u32(v) simde_vmaxvq_u32(v)
|
||||
#endif
|
||||
|
||||
SIMDE_END_DECLS_
|
||||
HEDLEY_DIAGNOSTIC_POP
|
||||
|
||||
#endif /* !defined(SIMDE_ARM_NEON_MAXV_H) */
|
||||
Reference in New Issue
Block a user